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LM3S608 Datasheet, PDF (21/416 Pages) List of Unclassifed Manufacturers – Microcontroller | |||
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LM3S608 Microcontroller
â Programmable interrupt generation logic with interrupt masking
â Lock register protection from runaway software
â Reset generation logic with an enable/disable
â User-enabled stalling when the controller asserts the CPU Halt flag during debug
â Synchronous Serial Interface (SSI)
â Master or slave operation
â Programmable clock bit rate and prescale
â Separate transmit and receive FIFOs, 16 bits wide, 8 locations deep
â Programmable interface operation for Freescale SPI, MICROWIRE, or Texas Instruments
synchronous serial interfaces
â Programmable data frame size from 4 to 16 bits
â Internal loopback test mode for diagnostic/debug testing
â UART
â Two fully programmable 16C550-type UARTs
â Separate 16x8 transmit (TX) and 16x12 receive (RX) FIFOs to reduce CPU interrupt service
loading
â Programmable baud-rate generator with fractional divider
â Programmable FIFO length, including 1-byte deep operation providing conventional
double-buffered interface
â FIFO trigger levels of 1/8, 1/4, 1/2, 3/4, and 7/8
â Standard asynchronous communication bits for start, stop, and parity
â False-start-bit detection
â Line-break generation and detection
â ADC
â Single- and differential-input configurations
â Eight 10-bit channels (inputs) when used as single-ended inputs
â Sample rate of 500 thousand samples/second
â Flexible, configurable analog-to-digital conversion
â Four programmable sample conversion sequences from one to eight entries long, with
corresponding conversion result FIFOs
â Each sequence triggered by software or internal event (timers, analog comparators, or GPIO)
October 01, 2007
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Preliminary
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