PT7A4410 Datasheet, PDF (15/34 Pages) List of Unclassifed Manufacturers – T1/E1/OC3 System Synchronizer

Data Sheet
PT7A4410/4410L
T1/E1/OC3 System Synchronizer
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
A simple way to control the Guard Time is shown in Figure 11.
The Guard Time can be calculated as follows:
t_Gd = RC x ln (
V
CC
V_CC - V_SIH
) ≅ RC x 0.6
In cases where fast toggling of the LOS1 input might be ex-
pected, an unsymmetrical Guard Time Circuit is recommended
as shown in Figure 12. This setting ensures that reference
switching does not occur until the entire guard time has ex-
pired. The timing diagram is shown in Figure 13.
* V is the logic high going threshold for the GTi Schmitt Trigger
SIH
input, see DC Electrical Characteristics.
Figure 11. Symmetrical Guard Time Circuit
Figure 12. Unsymmetrical Guard Time Circuit
PT7A4410/4410L
GTo
R
150kΩ
R_P
GTi
1kΩ
+C
10µF
PT7A4410/4410L
GTo
R_C
150kΩ
R_D
1kΩ
GTi
R_P
1kΩ
+C
10µF
Figure 13. Timing Example of Unsymmetrical Guard Time Circuit in Automatic Mode
SEC
Signal
Status
Good
LOS2
PRI
Signal
Status
LOS1
Good
Bad
T
D
Good
Bad
T
D
GTo
GTi
State
PT0106(09/02)
V_SIH
PRI
Normal
PRI
PRI
Holdover Normal
PRI
Holdover
15
SEC
Normal
Good
PRI
Normal
Ver:0