OXFW911 Datasheet, PDF (14/32 Pages) List of Unclassifed Manufacturers – IEEE1394 to ATA/ATAPI Native Bridge

OXFORD SEMICONDUCTOR LTD.
7 TIMING WAVEFORMS
OXFW911
ADDR valid
DIOR# /
DIOW#
ID[7:0]
(WRITE)
ID[7:0]
(READ)
IORDY
(Note1)
IORDY
(Note2)
IORDY
(Note3)
t0
t2
t9
t1
t2i
t3
t4
t5
t6z
t6
tA
tC
tRD
tC
tB
Figure 3: PIO / Register Transfer to / from IDE device
Notes : Negation of IORDY by the drive is used to extend the PIO cycle. The determination of whether the cycle is ot be
extended is made by the host after tA from the Assertion of DIOR# or DIOW#. The assertion and negation of IORDY are
described in the following three cases : -
1) Device never negates IORDY and no wait is generated.
2) Device negates IORDY before tA, but causes IORDY to be asserted before tA. IORDY is released prior to negation and
may be asserted for no more than 5ns before release : no wait generated.
3) Device negated IORDY before tA. IORDY is released prior to negation and may be asserted for no more than 5ns before
release : wait generated. The cycle completes after IORDY is reasserted. For cycles where a wait is generated and DIOR#
is asserted, the device shall place read data on DD[7:0] for tRD before asserting IORDY
Data Sheet Rev 1.1
Page 14