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M13S128168A_08 Datasheet, PDF (5/49 Pages) Elite Semiconductor Memory Technology Inc. – 2M x 16 Bit x 4 Banks Double Data Rate SDRAM
ESMT
M13S128168A
DC Specifications
Parameter
Symbol
Test Condition
Operation Current
(One Bank Active)
Operation Current
(One Bank Active)
Precharge Power-down
Standby Current
IDD0
IDD1
IDD2P
tRC = tRC (min), tCK = tCK (min),
Active – Precharge
Burst Length = 2, tRC = tRC (min), CL= 2.5,
IOUT = 0mA, Active-Read- Precharge
CKE ≤ VIL(max), tCK = tCK (min),
All banks idle
Idle Standby Current
IDD2N
Active Power-down Standby
Current
IDD3P
Active Standby Current
IDD3N
Operation Current (Read) IDD4R
Operation Current (Write)
Auto Refresh Current
Self Refresh Current
IDD4W
IDD5
IDD6
CKE ≥ VIH(min), CS ≥ VIH(min),
tCK = tCK (min)
All banks ACT, CKE ≤ VIL(max),
tCK = tCK (min)
One bank; Active-Precharge,
tRC = tRAS(max), tCK = tCK (min)
Burst Length = 2, CL= 3, tCK = tCK (min),
IOUT = 0 mA
Burst Length = 2, CL= 3, tCK = tCK (min)
tRC ≥ tRFC(min)
CKE ≤ 0.2V
Version
Unit Note
-4
-5
-6
140
140
140 mA
190
175
150 mA
40
40
40 mA
100
100
95 mA
55
50
45 mA
100
100
100 mA
300
245
215 mA
300
240
200 mA
300
270
250 mA
5
5
5
mA 1
Note: 1. Enable on-chip refresh and address counters.
AC Operation Conditions & Timing Specification
AC Operation Conditions
Parameter
Symbol
Min
Max
Unit
Note
Input High (Logic 1) Voltage, DQ, DQS and DM signals
Input Low (Logic 0) Voltage, DQ, DQS and DM signals
Input Different Voltage, CLK and CLK inputs
VIH(AC) VREF + 0.31
V
VIL(AC)
VREF - 0.31
V
VID(AC)
0.7
VDDQ+0.6
V
1
Input Crossing Point Voltage, CLK and CLK inputs
VIX(AC) 0.5*VDDQ-0.2 0.5*VDDQ+0.2
V
2
Note: 1. VID is the magnitude of the difference between the input level on CLK and the input on CLK .
2. The value of VIX is expected to equal 0.5*VDDQ of the transmitting device and must track variations in the DC level of the
same.
Input / Output Capacitance
(VDD = 2.375V~2.75V, VDDQ =2.375V~2.75V, TA = 25 °C , f = 1MHz)
(VDD = 2.6V~2.8V, VDDQ =2.6V~2.8V, TA = 25 °C , f = 1MHz (for speed -4))
Parameter
Symbol
Input capacitance
(A0~A11, BA0~BA1, CKE, CS , RAS , CAS , WE )
CIN1
Min
Max
Unit
2.5
3.5
pF
Input capacitance (CLK, CLK )
Data & DQS input/output capacitance
Input capacitance (DM)
CIN2
COUT
CIN3
2.5
3.5
pF
4.0
5.5
pF
4.0
5.5
pF
Elite Semiconductor Memory Technology Inc.
Publication Date : Dec. 2008
Revision : 2.2
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