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| S1D13506 Datasheet, PDF (652/696 Pages) Epson Company – S1D13506 Color LCD/CRT/TV Controller | |||
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Page 12
Epson Research and Development
Vancouver Design Center
4 VR4121 to S1D13506 Interface
4.1 Hardware Description
The NEC VR4121 microprocessor is specifically designed to support an external LCD
controller. It provides all the necessary internal address decoding and control signals
required by the S1D13506.
The diagram below shows a typical implementation utilizing the S1D13506.
NEC VR4121
S1D13506
WR#
SHB#
RD#
WE0#
WE1#
RD#
LCDCS#
LCDRDY
ADD[25:0]
DAT[15:0]
BUSCLK
VDD3
VDD2
+3.3V
+2.5V
Pull-up
System RESET
ADD21
CS#
WAIT#
RESET#
M/R#
AB[20:0]
DB[15:0]
BUSCLK
VDD(+3.3V)
BS#
RD/WR#
VDD
Note:
When connecting the S1D13506 RESET# pin, the system designer should be aware of all
conditions that may reset the S1D13506 (e.g. CPU reset can be asserted during wake-up
from power-down modes, or during debug states).
Figure 4-1: NEC VR4121 to S1D13506 Configuration Schematic
Note
For pin mapping see Table 3-1:, âHost Bus Interface Pin Mapping,â on page 10.
S1D13506
X25B-G-011-02
Interfacing to the NEC VR4121⢠Microprocessor
Issue Date: 01/02/08
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