EN29GL256HL Datasheet, PDF (22/57 Pages) Eon Silicon Solution Inc. – 256 Megabit (32768K x 8-bit / 16384K x 16-bit) Flash Memory Page mode Flash Memory, CMOS 3.0 Volt-only

EN29GL256H/L
After an erase command sequence is written, if all sectors selected for erasing are protected, Data#
Polling on DQ7 is active for approximately 100 µs, then the device returns to the read mode. If not all
selected sectors are protected, the Embedded Erase algorithm erases the unprotected sectors, and
ignores the selected sectors that are protected. However, if the system reads DQ7 at an address within
a protected sector, the status may not be valid.
Just prior to the completion of an Embedded Program or Erase operation, DQ7 may change
asynchronously with DQ6-DQ0 while Output Enable (OE#) is asserted low. That is, the device may
change from providing status information to valid data on DQ7. Depending on when the system
samples the DQ7 output, it may read the status or valid data. Even if the device has completed the
program or erase operation and DQ7 has valid data, the data outputs on DQ6-DQ0 may be still invalid.
Valid data on DQ7-D00 appears on successive read cycles.
Figure 7. Write Operation Status Flowchart
DQ6: Toggle Bit I
Toggle Bit I on DQ6 indicates whether an Embedded Program or Erase algorithm is in progress or
complete, or whether the device has entered the Erase Suspend mode. Toggle Bit I may be read at any
address, and is valid after the rising edge of the final WE# pulse in the command sequence (prior to the
This Data Sheet may be revised by subsequent versions
22
or modifications due to changes in technical specifications.
©2013 Eon Silicon Solution, Inc.,
Rev. j, Issue Date: 2013/08/06
www.eonssi.com