English
Language : 

EPVP6300 Datasheet, PDF (57/63 Pages) ELAN Microelectronics Corp – VFD Controller
ePVP6300
VFD Controller
13 Key & Switch Scanning and Display Timing
The key & switch scanning and display timing diagram is given below. One cycle of key &
switch scanning consists of 2 frames. The data of the 12 x 4 matrix is stored in the RAM.
Fig. 18 Key & Switch Scanning and Display Timing Diagram
This specification is subject to change without further notice.
11/04.2004 (V1.92)51 of 63