EPVP6300 Datasheet, PDF (32/63 Pages) ELAN Microelectronics Corp – VFD Controller

ePVP6300
VFD Controller
Bit 7 (CNT2S) : COUNTER2 clock source
0 16.384kHz
timing = ( 1 /16.384k) * prescaler * (256 – count vaule)
1 system clock
timing = ( 2 / system clock) * prescaler* (256 – count vaule)
7.3.5 IOC9 (PORT9 I/O Control)
a) PAGE 0 (PORT9 I/O Control Register)
Bit 7
IOC97
R/W-1
Bit 6
IOC96
R/W-1
Bit 5
IOC95
R/W-1
Bit 4
IOC94
R/W-1
Bit 3
IOC93
R/W-1
Bit 2
IOC92
R/W-1
Bit 1
IOC91
R/W-1
Bit 0
IOC90
R/W-1
Bit 0 ~ Bit 7 (IOC90 ~ IOC97) : PORT9 (0~7) I/O direction control register
0 set the relative I/O pin as output
1 set the relative I/O pin into high impedance
b) PAGE 1 ( Clock Source and Prescaler for COUNTER3 and COUNTER4)
Bit 7
CNT4S
R/W-0
Bit 6
Bit 5
Bit 4
C4_PSC2 C4_PSC1 C4_PSC0
R/W-0 R/W-0 R/W-0
Bit 3
CNT3S
R/W-0
Bit 2
Bit 1
Bit 0
C3_PSC2 C3_PSC1 C3_PSC0
R/W-0 R/W-0 R/W-0
Bit 0 ~ Bit 2 (C3_PSC0 ~ C3_PSC2) : COUNTER3 prescaler ratio
C3_PSC2 C3_PSC1 C3_PSC0 COUNTER3
0
0
0
1:2
0
0
1
1:4
0
1
0
1:8
0
1
1
1:16
1
0
0
1:32
1
0
1
1:64
1
1
0
1:128
1
1
1
1:256
Bit 3 (CNT3S) : COUNTER3 clock source
0 16.384kHz
timing = ( 1 /16.384k) * prescaler * (256 – count vaule)
1 system clock
timing = ( 2 / system clock) * prescaler* (256 – count vaule)
Bit 4 ~ Bit 6 (C4_PSC0 ~ C4_PSC2) : COUNTER4 prescaler ratio
C4_PSC2 C4_PSC1 C4_PSC0 COUNTER4
0
0
0
1:2
0
0
1
1:4
0
1
0
1:8
0
1
1
1:16
1
0
0
1:32
26 of 63 11.04.2004 (V1.92)
This specification is subject to change without further notice.