EPVP6300 Datasheet, PDF (12/63 Pages) ELAN Microelectronics Corp – VFD Controller

ePVP6300
VFD Controller
6 Pin Descriptions
Pin No.
61,62
13,14
57
58
59
60
53 – 54
15-22
(B Cell)
23-30
(B Cell)
31-33
(B Cell)
34-38
(A Cell)
Pin Name
NC
VDD
STB/GPIOC4
CLK/GPIOC5
DOUT/GPIOC6
DIN/GPIOC7
GPIOC0 – GPIOC3
GR1 – GR8
GR9/P9/SG20
–
GR16/ SG13
GR17/SG12/KS12
–
GR19 /SG10/KS10
SG9/KS9
–
SG5/KS5
I/O #
Description
Note
2
- 2 Logic power supply
1. Serial Interface Strobe input pin. While the STB goes low, it
will cause interrupt event. The data input after the STB has
I/O 1
fallen is processed as a command. When this pin is “HIGH,” Schmitt
CLK is ignored.
Pull-up
2. Programmable Internal pull high
3. GPIOC4 function
1. Clock input pin. This pin reads serial data at the rising edge
and outputs data at the falling edge.
I/O 1 _{2. Programmable Internal pull high}
3. GPIOC5 function
Schmitt
Pull-up
1. Data output pin (N-channel, Open-Drain)
I/O
1
2. This pin outputs serial data at the falling edge of the shift clock
(starting from lower bit).
Schmitt
3. Programmable internal pull high
Pull-up
4. GPIOC6 function
1. Data input pin. This pin inputs serial data at the rising edge of
the shift clock (starting from lower bit.)
I/O 1 _{2. Programmable Internal pull high}
Schmitt
Pull-up
3. GPIOC7 function
General Purpose I/O pins:
1. Key data input to these pins is latched at the end of display
cycle.
Schmitt
I/O 4 _{2. These pins constitute 4-bit general-purpose input/output port. Pull-up}
3. Programmable Internal Pull-High
4. Wake-up Function
1. High voltage grid output
O8
∼
2. High breakdown output
1. High voltage grid output
O 8 2. High breakdown output
3. High voltage segment output
1. High voltage grid output
2. High breakdown output
O3
3. High voltage segment output
4. Matrix key scan output
1. High breakdown output
O 5 2. High voltage segment output
3. Matrix key scan output
6 of 63 11.04.2004 (V1.92)
This specification is subject to change without further notice.