EPVP6300 Datasheet, PDF (21/63 Pages) ELAN Microelectronics Corp – VFD Controller

ePVP6300
VFD Controller
fpll
14.331MHz
10.747MHz
7.165MHz
3.582MHz
1.791MHz
895.658kHz
447.829kHz
This is a CMOS multi-channel 10-bit successive approximation A/D converter.
Features:
74.6kHz maximum conversion speed at 5V
Adjusted full scale input
External reference voltage input or internal (VDD) reference voltage
6 analog inputs multiplexed into one A/D converter
Power down mode for power saving
A/D conversion complete interrupt
Interrupt register, A/D control and status register, and A/D data register
PLL
fpll
Programmable
divider
fs
1/Mx
fad
Divider _c
Nx
ADCLK1~ADCLK0
10-bit
ADC
ADC output
ENPLL
CLK2 ~ CLK0
Fig. 5 ADC Voltage Control Logic
fadcon = fadc / 12
Mx
fs
Nx = 1
Nx = 2
Nx = 4
Nx = 8
16
895.658kHz 74.638kHz 37.391kHz 18.659khz 9.329kHz
12
895.658kHz 74.638kHz 37.391kHz 18.659khz 9.329kHz
8
895.658kHz 74.638kHz 37.391kHz 18.659khz 9.329kHz
4
895.658kHz 74.638kHz 37.391kHz 18.659khz 9.329kHz
2
895.658kHz 74.638kHz 37.391kHz 18.659khz 9.329kHz
1
895.658kHz 74.638kHz 37.391kHz 18.659khz 9.329kHz
1
447.829kHz 37.391kHz 18.659khz 9.329kHz
4.665kHz
Bit 5 ~ Bit 7 (IN0 ~ IN2) : Input channel selection of AD converter
These two bits can choose one of the three AD inputs.
IN2
IN1
IN0
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
Input
AD1
AD2
AD3
AD4
AD5
AD6
This specification is subject to change without further notice.
11/04.2004 (V1.92)15 of 63