HB54A1288KM Datasheet, PDF (8/16 Pages) Elpida Memory – 128MB DDR SDRAM S.O. DIMM

HB54A1288KM
Block Diagram
/S0
RS
DQS0
RS
DM0
8 RS
DQ0 to DQ7
DQS1
DM1
DQ8 to DQ15
RS
RS
8 RS
E DQS2
DM2
DQ16 to DQ23
O_DQS3
DM3
L^{DQ24 to DQ31}
RS
RS
8 RS
RS
RS
8 RS
BA0 to BA1
A0 to AN
/RAS
/CAS
/WE
CKE0
CKE1
VCCSPD
VREF
VCC
VSS
VCCID
Open
LDQS
/S
LDM
I/O0 to I/O7
UDQS
D0
UDM
I/O8 to I/O15
DQS4
DM4
DQ32 to DQ39
DQS5
DM5
DQ40 to DQ47
RS
RS
8 RS
RS
RS
8 RS
LDQS
/S
LDM
I/O0 to I/O7
UDQS
D2
UDM
I/O8 to I/O15
LDQS
/S
LDM
I/O0 to I/O7
UDQS
D1
UDM
I/O8 to I/O15
DQS6
DM6
DQ48 to DQ55
DQS7
DM7
DQ56 to DQ63
RS
RS
8 RS
RS
RS
8 RS
/S
LDQS
LDM
I/O0 to I/O7
UDQS
D3
UDM
I/O8 to I/O15
* D0 to D3 : HM5425161
SDRAMs (D0 to D3)
U0 : 2-kbit EEPROM
Rs : 22 W
Serial PD
SDRAMs (D0 to D3)
SDRAMs (D0 to D3)
SDRAMs (D0 to D3)
PSDRAMs (D0 to D3)
SDRAMs (D0 to D3)
SCL
SCL
SDA
SA0
A0 _U0
SA1
A1
SA2
A2 WP
SDA
N.C.
SPD
SDRAMs (D0 to D3)
r_{SDRAMs (D0 to D3) VCC and VCCQ}
CK0
/CK0
CK1
/CK1
CK2
2 loads
2 loads
10 pF
o_{SDRAMs (D0 to D3), SPD}
/CK2
Notes :
1. DQ wiring may differ from that described
in this drawing; however DQ/DM/DQS
relationships are maintained as shown.
d_{VCCID strap connections:}
(for memory device VCC, VCCQ)
Strap out (open): VCC = VCCQ
Strap in (closed): VCC ≠ VCCQ
2. The SDA pull-up registor is reguired due to
u_{the open-drain/open-collector output.}
3. The SCL pull-up registor is recommended,
because of the normal SCL lime inactive
ct ^{"high" state.}
Preliminary Data Sheet E0190H10 (Ver. 1.0)
8