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HB56UW873E-F Datasheet, PDF (7/27 Pages) Elpida Memory – 64MB Buffered EDO DRAM DIMM 8-Mword × 72-bit, 4k Refresh, 1 Bank Module (9 pcs of 8M × 8 components) | |||
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HB56UW873E-F
DC Characteristics
HB56UW873E
50 ns
60 ns
Parameter
Symbol Min Max Min Max Unit Test conditions
Notes
Operating current
I CC1
â
1225 â
1045 mA tRC = min
1, 2
Standby current
I CC2
â
28
â
28
mA TTL interface
RAS, CAS = VIH
Dout = High-Z
â
14.5 â
14.5 mA CMOS interface
RAS, CAS ⥠VCC â 0.2 V
Dout = High-Z
RAS-only refresh
I CC3
â
1225 â
1045 mA tRC = min
2
current
Standby current
I CC5
â
55
â
55
mA
RAS = VIH, CAS = VIL
1
Dout = enable
CAS-before-RAS
refresh current
I CC6
â
1225 â
1045 mA tRC = min
EDO page mode
I CC7
current
Input leakage current ILI
Output leakage current ILO
â
1000 â
910 mA RAS = VIL , CAS cycle, 1, 3
tHPC = tHPC min
â5
5
â5
5
µA
0 V ⤠Vin ⤠VCC + 0.3 V
â5
5
â5
5
µA
0 V ⤠Vout ⤠VCC
Dout = disable
Output high voltage VOH
2.4
VCC
2.4
VCC
V
High Iout = â2 mA
Output low voltage
VOL
0
0.4 0
0.4 V
Low Iout = 2 mA
Notes: 1. ICC depends on output load condition when the device is selected, ICC max is specified at the output
open condition.
2. Address can be changed once or less while RAS = VIL.
3. Measured with one sequential address change per EDO cycle, tHPC.
Capacitance (Ta = 25°C, VCC = 3.3 V ± 0.3 V)
Parameter
Symbol
Typ
Max
Unit
Notes
Input capacitance (Address)
CI1
â
20
pF
1
Input capacitance (CAS, WE, OE)
CI2
â
20
pF
1
Input capacitance (RAS)
CI3
â
55
pF
1
I/O capacitance (DQ)
CI/O
â
20
pF
1, 2
Notes: 1. Capacitance measured with Boonton Meter or effective capacitance measuring method.
2. CAS = VIH to disable Dout.
Data Sheet E0102H10
7
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