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HB52F328EM-75B Datasheet, PDF (14/19 Pages) Elpida Memory – 256MB Unbuffered SDRAM DIMM
HB52F328EM-75B, HB52F329EM-75B
AC Characteristics (TA = 0 to 65°C,VCC = 3.3V ± 0.3V, VSS = 0V)
Parameter
System clock cycle time
CK high pulse width
PC133
CL = 3
PC100
CL = 2
PC100
Symbol Symbol min.
max.
min.
max.
Unit
tCK
Tclk
7.5
—
10
—
ns
tCKH
Tch
2.5
—
3
—
ns
CK low pulse width
Access time from CK
tCKL
Tcl
2.5
—
3
—
ns
tAC
Tac
—
5.4
—
6
ns
Data-out hold time
CK to Data-out low impedance
tOH
Toh
2.7
—
3
tLZ
2
—
2
—
ns
—
ns
CK to Data-out high impedance
Data-in setup time
tHZ
—
5.4
—
6
ns
tDS
Tsi
1.5
—
2
—
ns
Data in hold time
Address setup time
tDH
Thi
0.8
—
1
tAS
Tsi
1.5
—
2
—
ns
—
ns
Address hold time
CKE setup time
tAH
Thi
0.8
—
1
tCES
Tsi
1.5
—
2
—
ns
—
ns
CKE setup time for power down exit
tCESP Tpde 1.5
—
2
CKE hold time
tCEH
Thi
0.8
—
1
—
ns
—
ns
Command setup time
Command hold time
tCS
Tsi
1.5
—
2
tCH
Thi
0.8
—
1
—
ns
—
ns
Ref/Active to Ref/Active command period tRC
Trc
67.5
Active to precharge command period
tRAS
Tras
45
Active command to column command
(same bank)
tRCD
Trcd
20
Precharge to active command period
tRP
Trp
20
Write
time
recovery
or
data-in
to
precharge
lead
tDPL
Tdpl
15
Active (a) to Active (b) command period tRRD
Trrd
15
—
70
120000 50
—
20
—
20
—
20
—
20
—
ns
120000 ns
—
ns
—
ns
—
ns
—
ns
Transition time (rise and fall)
tT
1
5
1
5
ns
Refresh period
tREF
—
64
—
64
ms
Notes: 1. AC measurement assumes tT = 1ns. Reference level for timing of input signals is 1.5V.
2. Access time is measured at 1.5V. Load condition is CL = 50pF.
3. tLZ (min.) defines the time at which the outputs achieves the low impedance state.
4. tHZ (max.) defines the time at which the outputs achieves the high impedance state.
5. tCES defines CKE setup time to CK rising edge except power down exit command.
Notes
1
1
1
1, 2
1, 2
1, 2, 3
1, 4
1
1
1
1
1, 5
1
1
1
1
1
1
1
1
1
1
Test Conditions
• Input and output timing reference levels: 1.5V
• Input waveform and output load: See following figures
input
2.4V
2.0V
0.4V 0.8V
I/O
CL
tT
tT
Output load
Data Sheet E0184H10 (Ver. 1.0)
14