HB54A5128FN-A75B Datasheet, PDF (1/17 Pages) Elpida Memory – 512MB Unbuffered DDR SDRAM DIMM

DATA SHEET
512MB Unbuffered DDR SDRAM DIMM
HHBB5544AA55112289FFNN--AA7755BB//BB7755BB//1100BB ((6644MM wwoorrddss ×× 6742 bbiittss,, 22 BBaannkkss)) _Description
The HB54A5128FN, HB54A5129FN are Double Data
Rate (DDR) SDRAM Module, mounted 256M bits DDR
ESDRAM (HM5425801BTT) sealed in TSOP package,
and 1 piece of serial EEPROM (2k bits EEPROM) for
Presence Detect (PD). The HB54A5128FN is
organized as 32M × 64 × 2 banks mounted 16 pieces
of 256M bits DDR SDRAM. The HB54A5129FN is
O_{organized as 32M × 72 × 2 banks mounted 18 pieces}
of 256M bits DDR SDRAM. Read and write operations
are performed at the cross points of the CK and the
/CK. This high-speed data transfer is realized by the 2
L ^{bits prefetch-pipelined architecture. Data strobe (DQS)}
Features
• 184-pin socket type package (dual lead out)
 Outline: 133.35mm (Length) × 31.75mm (Height) ×
4.00mm (Thickness)
 Lead pitch: 1.27mm
• 2.5V power supply (VCC/VCCQ)
• SSTL-2 interface for all inputs and outputs
• Clock frequency: 143MHz/133MHz/125MHz (max.)
• Data inputs, outputs and DM are synchronized with
DQS
• 4 banks can operate simultaneously and
independently (Component)
both for read and write are available for high speed and
reliable data bus design. By setting extended mode
register, the on-chip Delay Locked Loop (DLL) can be
set enable or disable. An outline of the products is
184-pin socket type package (dual lead out).
Therefore, it makes high density mounting possible
without surface mount technology. It provides common
P _{data inputs and outputs. Decoupling capacitors are}
roduct ^{mounted beside each TSOP on the module board.}
• Burst read/write operation
• Programmable burst length: 2, 4, 8
 Burst read stop capability
• Programmable burst sequence
 Sequential
 Interleave
• Start addressing capability
 Even and Odd
• Programmable /CAS latency (CL): 2, 2.5
• 8192 refresh cycles: 7.8µs (8192/64ms)
• 2 variations of refresh
 Auto refresh
 Self refresh
Document No. E0087H40 (Ver. 4.0)
Date Published August 2002 (K) Japan
URL: http://www.elpida.com
This product became EOL in May, 2004.
Elpida Memory, Inc. 2001-2002
Hitachi, Ltd. 2000
Elpida Memory, Inc. is a joint venture DRAM company of NEC Corporation and Hitachi, Ltd.