E981.07 Datasheet, PDF (39/46 Pages) ELMOS Semiconductor AG – Two independent operating channels

Two Channel Sensor Interface PSI5
ADVANCE PRODUCT INFORMATION JUL 26, 2011
5.2.6.3 SPI Failure Mode
E981.07
5.2.6.3.1 SPI Errors
SPI Errors are defined as a condition, where the SPI frame format is incorrect. When detected, the 981.07
response with an error response message on MISO with the SPI Error (SE) bit is set.
The following conditions generate a SPI Error:
• Incorrect number of SPI SCK cycles while CSB is active (low). In case of zero SCK cycles no error bit is set.
• SCK is high at CSB falling edge.
5.2.6.3.2 SPI Request Errors
SPI Request Errors are defined as conditions where the contents of a SPI request message are incorrect.
When detected, the 981.07 responds with an error response message on MISO with the Request Error (RE) bit
being set.
The following conditions generate an SPI Request Error:
• Undefined command (incorrect address in bits [12:8])
ELMOS Semiconductor AG
Data Sheet 39 / 45
QM-No.: 25DS0050E.00
This document contains information on a new product. ELMOS Semiconductor AG reserves the right to change specifications and information herein without notice.