E981.07 Datasheet, PDF (3/46 Pages) ELMOS Semiconductor AG – Two independent operating channels

Two Channel Sensor Interface PSI5
ADVANCE PRODUCT INFORMATION JUL 26, 2011
1.2 Pin Function Description
E981.07
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Name
VBUS
N.C.
SATFD1
SATFD2
AGND1
TEST
SAT_SYNC
RESETB
CLK
CSB
SCK
MOSI
MISO
DGND
VCC
16 V3_3
17 TESTBUS
18 REXT
19 AGND2
20 VSYNC
Description
Supply voltage BUS
Not connected to die
Satellite channel feed 1
Satellite channel feed 2
Analogue Ground
Test Pin, connect to GND
Sync pulse trigger input
Reset input, active low
System clock input
Chip Select Input for SPI
Master Out Slave In, SPI CLock input
Master Out Slave In, SPI Data input
Master In Slave Out, SPI Data output
Digital Ground
Input supply voltage, can be 5V or 3.3V. Has to be be connected to V3_3 in case
of 3.3V input voltage. (Buffer cap higher than 22nF recommended)
internal 3.3v regulator output:
- in case Vcc = 5.0v: 47nF buffer cap recommended (22nF min)
- in case Vcc = 3.3v: V3_3 to be shorted to Vcc
Output analogue test bus, do not connect
External resistor for reference current
Analogue Ground
Sync Supply Input
Backside: exposed die Pad connected to AGND1 / AGND2 via bulk
ELMOS Semiconductor AG
Data Sheet 3 / 45
QM-No.: 25DS0050E.00
This document contains information on a new product. ELMOS Semiconductor AG reserves the right to change specifications and information herein without notice.