E520.14 Datasheet, PDF (22/41 Pages) ELMOS Semiconductor AG – Provides four HS-CAN physical interfaces

Quad CAN transceiver
PRODUCTION DATA – FEB 4, 2014
E520.14
4.3.4 CAN Configuration
Register Name
CAN_CFG_ALL
CAN_CFG1
CAN_STAT1
CAN_CFG2
CAN_STAT2
CAN_CFG3
CAN_STAT3
CAN_CFG4
CAN_STAT4
Address
x08
x10
x11
x14
x15
x18
x19
x1C
x1D
Description
Hot access to all CAN RC and CAN TR bits
Configuration register for CAN1
Status register for CAN1
Configuration register for CAN2
Status register for CAN2
Configuration register for CAN3
Status register for CAN3
Configuration register for CAN4
Status register for CAN4
Table 21: CAN RegisterTable
Register CAN_CFG1 (x10)
MSB
Content
BIAS
FAILINTE BFEN
WUINTEN RCISON WU
TR
N
Reset value
0
0
0
1
0
1
0
Access
R/W
R/W
R/W
R/W
R
R/W
R/W
Bit Description
BIAS :
1..Enable automatic bus biasing
0..Disable automatic bus biasing
FAILINTEN :
1..Interrupt enabled for CAN failures
0..Interrupt disabled for CAN failures
BFEN :
1..Bus failure detection is enabled
0..Bus failure detection is disabled
WUINTEN :
1..Interrupt enabled if WU is detected
0..Interrupt disabled if WU is detected
RCISON :
1..Receiver is enabled whether via RC or BIAS
0..Receiver is disabled
WU :
1..Wake up capability enabled, only valid if RC and TR are 0
0..Wake up capability disabled
TR :
1..Transmitter enabled, RC is enabled automatically, WU is masked
0..Transmitter disabled
RC :
1..Receiver enabled, listen only, WU is masked
0..Receiver disabled
Table 22: Configuration register for CAN1
LSB
RC
0
R/W
Elmos Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
Elmos Semiconductor AG
Data Sheet 22 / 41
QM-No.: 25DS2014E.02