E520.14 Datasheet, PDF (18/41 Pages) ELMOS Semiconductor AG – Provides four HS-CAN physical interfaces

Quad CAN transceiver
PRODUCTION DATA – FEB 4, 2014
E520.14
4.3 HS-CAN Transceiver; pins CANH, CANL, RXD, TXD, VCC
The HS-CAN transceiver is compatible to ISO 11898-2 and to ISO 11898-5.
CANH and CANL interface the CAN protocol controller to HS-CAN physical layer wires. Data rate can be selected
up to 1 Mbaud.
Fig. 2: HS-CAN Bus timing
4.3.1 HS-CAN Wake up
The device is capable detecting wake up pattern at the CAN bus if configured. A wake up pattern ideally consists of
four consecutive symbols dominant, recessive, dominant and recessive. The dominant bus states have to be longer
than tCAN,WAKE_BUS_DOM and the recessive bus states have to be longer than t . CAN,WAKE_BUS_REC The pattern must be
applied within tWAKE2. Otherwise it will be discared.
When the wake up pattern is recognized, the corresponding flag in register WU_SRC is set. An interrupt is
generated if bit CAN_CFG.INTEN is set.
The wake up is signalised always via setting pin RXD = L. The wake up is cleared if bit CAN_CFG.RCENA or
CAN_CFG.TRENA are set or CAN_CFG.WUENA is reset or register WU_SRC is read. In state SLEEP a transition
is performed into state STANDBY.
>t
CAN,W AKE_BUS_DOM
>t
CAN,WAKE_BUS_DOM
dominant
>t
CAN,WAKE_BUS_REC
recessive
dominant
Fig. 3: Remote Wake Up Pattern
>t
CAN,WAKE_BUS_REC
recessive
Elmos Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
Elmos Semiconductor AG
Data Sheet 18 / 41
QM-No.: 25DS2014E.02