DS1375 Datasheet, PDF (7/11 Pages) Dallas Semiconductor – 2-Wire Digital Input RTC with Alarm

2-Wire Digital Input RTC with Alarm
The countdown chain is reset whenever the seconds
register is written. Write transfers occur on the acknowl-
edge from the DS1375. Once the countdown chain is
reset, to avoid rollover issues the remaining time and
date registers must be written within 1 second. The 1Hz
square-wave output, if enabled, transitions high 500ms
after the seconds data transfer, provided the clock
input is already being driven.
Alarms
The DS1375 contains two time-of-day/date alarms.
Alarm 1 can be set by writing to registers 07h–0Ah.
Alarm 2 can be set by writing to registers 0Bh–0Dh.
The alarms can be programmed (by the alarm enable
and INTCN bits of the control register) to activate the
SQW/INT output on an alarm match condition. Bit 7 of
the time-of-day/date alarm registers are mask bits
(Table 2). When all the mask bits for each alarm are
logic 0, an alarm only occurs when the values in the
timekeeping registers match the corresponding values
stored in the time-of-day/date alarm registers. The
alarms can also be programmed to repeat every sec-
ond, minute, hour, day, or date. Table 2 shows the pos-
sible settings. Configurations not listed in the table
result in illogical operation.
The DY/DT bits (bit 6 of the alarm day/date registers)
control whether the alarm value stored in bits 0–5 of
that register reflects the day of the week or the date of
the month. If DY/DT is written to logic 0, the alarm is the
result of a match with date of the month. If DY/DT is
written to logic 1, the alarm is the result of a match with
day of the week.
When the RTC register values match alarm register set-
tings, the corresponding alarm flag A1F or A2F bit is
set to logic 1. If the corresponding alarm interrupt
enable A1IE or A2IE is also set to logic 1, and the
INTCN bit is set to logic 1, the alarm condition activates
the SQW/INT signal. The match is tested on the once-
per-second update of the time and date registers.
Special Purpose Registers
The DS1375 has two additional registers (control and
status) that control the RTC, alarms, and square-wave
output.
Table 2. Alarm Mask Bits
ALARM 1 REGISTER MASK
DY/DT
BITS (BIT 7)
ALARM RATE
A1M4 A1M3 A1M2 A1M1
X
1
1
1
1
Alarm once per
second
X
1
1
1
0
Alarm when seconds
match
X
1
1
0
0
Alarm when minutes
and seconds match
Alarm when hours,
X
1
0
0
0 minutes, and seconds
match
Alarm when date,
0
0
0
0
0 hours, minutes, and
seconds match
Alarm when day,
1
0
0
0
0 hours, minutes, and
seconds match
ALARM 2 REGISTER
DY/DT ^{MASK BITS (BIT 7)}
A2M4 A2M3 A2M2
ALARM RATE
X
1
1
1 ^{Alarm once per minute}
(00 seconds of every min)
X
1
1
0 Alarm when minutes match
X
1
0
0
Alarm when hours and
minutes match
0
0
0
0
Alarm when date, hours, and
minutes match
1
0
0
0 ^{Alarm when day, hours, and}
minutes match
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