DS1375 Datasheet, PDF (5/11 Pages) Dallas Semiconductor – 2-Wire Digital Input RTC with Alarm

2-Wire Digital Input RTC with Alarm
Typical Operating Characteristics (continued)
(V_CC = +3.3V, T_A = +25°C, unless otherwise noted.)
I_CCS vs. TEMPERATURE
135.0
132.5
130.0
V_CC = 3.0V
127.5
125.0
122.5
120.0
117.5
115.0
-40 -20 0 20 40 60 80
TEMPERATURE (°C)
I_CCS vs. CLK INPUT VOLTAGE
500
450
400
V_CC = 5.0V
350
300
250
V_CC = 4.0V
200
150
100
50
0
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
CLK VOLTAGE (V)
Pin Description
PIN
NAME
FUNCTION
1
CLK
Digital Clock Input. This pin must be 32,768Hz, 8192Hz, 60Hz, or 50Hz square wave, 45% to 55%
duty cycle.
2
SQW/INT Square-Wave/Interrupt Output. This pin is open drain and requires an external pullup resistor.
3
GND
Ground
4
SDA
Serial Data Input/Output. SDA is the data input/output for the 2-wire serial interface. It is open drain
and requires an external pullup resistor.
5
SCL
Serial Clock Input. SCL is the clock input for the 2-wire serial interface, and is used to synchronize
data movement on the serial interface.
6
V_CC
DC Power for Primary Power Supply
Detailed Description
The DS1375 digital input RTC with alarm is a low-power
clock/calendar with two programmable time-of-day
alarms and a programmable square-wave output.
Address and data are transferred serially through the
2-wire serial interface bus. The clock/calendar provides
seconds, minutes, hours, day, date, month, and year
information. The date at the end of the month is auto-
matically adjusted for months with fewer than 31 days,
including corrections for leap year. The clock operates
in either the 24-hour or 12-hour format with an AM/PM
indicator. The DS1375 requires an external clock
source selectable between 32,768Hz, 8192Hz, 60Hz,
or 50Hz for the timekeeping function. Sixteen bytes of
SRAM are provided for additional user storage.
Operation
The DS1375 operates as a slave device on the serial
bus. Access is obtained by implementing a START
condition and providing a device identification code,
followed by data. Subsequent registers can be
accessed sequentially until a STOP condition is execut-
ed. The functional diagram in Figure 2 shows the main
elements of the serial RTC.
Address Map
Table 1 shows the address map for the timekeeping
registers and SRAM. The 16 bytes of SRAM occupy
addresses 10–1Fhex. During a multibyte access, when
the address pointer reaches the end of the register
space (1Fh), it wraps around to location 00h. On a
2-wire START, STOP, or address pointer incrementing
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