DS80C320 Datasheet, PDF (28/42 Pages) Dallas Semiconductor – High-Speed/Low-Power Micro

5. When addressing external memory.
DS80C320/DS80C323
6. RST= V_CC. This condition mimics operation of pins in I/O mode.
7. During a 0 to 1 transition, a one-shot drives the ports hard for two clock cycles. This measurement
reflects port in transition mode.
8. Ports 1, 2, and 3 source transition current when being pulled down externally. It reaches its maximum
at approximately 2V.
9. V_IN between ground and V_CC - 0.3V. Not a high impedance input. This port is a weak address latch
because Port 0 is dedicated as an address bus on the DS80C323. Peak current occurs near the input
transition point of the latch, approximately 2V.
10. Over the industrial temperature range, this specification has a maximum value of 200 µA.
11. This is the current from an external circuit to hold a logic low level on an I/O pin while the
corresponding port latch bit is set to 1. This is only the current required to hold the low level;
transitions from 1 to 0 on an I/O pin will also have to overcome the transition current.
12. Device operating range is 2.7V to 5.5V, however device is tested to 2.5V to ensure proper operation
at minimum V_RST .
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