DS80C410 Datasheet, PDF (101/102 Pages) Dallas Semiconductor – Network Microcontrollers with Ethernet and CAN

DS80C410/DS80C411 Network Microcontrollers with Ethernet and CAN
source (not the ring oscillator), the device clears the ring oscillator mode bit, RGMD (EXIF.2), to indicate that the
device has switched from the ring oscillator to the external clock source.
The ring oscillator runs at approximately 15MHz, but varies over temperature and voltage. As a result, no serial
communication or precision timing should be attempted while running from the ring oscillator, since the operating
frequency is not precise. Likewise, the Ethernet and CAN controllers derive their timing from the system clock and
should not be enabled until RGMD = 0. The reset (default) state of the RGSL bit is logic 0, which does not result in
use of the ring oscillator to exit stop mode.
EMI Reduction
One of the major contributors to radiated noise in an 8051-based system is the toggling of ALE. The microcontroller
allows software to disable ALE when not used by setting the ALEOFF (PMR.2) bit to a 1. When ALEOFF = 1, ALE
automatically toggles during off-chip program and data memory accesses. However, ALE remains static when
performing on-chip memory access. The default state of ALEOFF is 0, so ALE normally toggles at a frequency of
XTAL/4.
Software Breakpoint Mode
The DS80C410 provides a special software-breakpoint mode for code-debug purposes. Breakpoint mode can be
enabled by setting the BPME bit (ACON.4) to a logic 1. Once enabled, the A5h op code can be used to create a
break in code execution. When the break op code (A5h) is executed, all clocks to the timer 0, 1, 2, 3, and watchdog
timer blocks are stopped and any serial port operation (when derived from a timer) is halted. Additionally, the state
machine controlling access to timed-access-protected SFRs is suspended. Much like an interrupt, the CPU
generates a hardware LCALL and vector to address location 000083h. Unlike an interrupt, however, the return
address is not pushed onto the stack, but is placed into the BPA1 (LSB), BPA2 (MSB), and BPA3 (XSB) SFRs, and
the A5h op code is used to exit breakpoint mode and return to the address contained in the BPA3:1 SFRs.
PIN CONFIGURATION
TOP VIEW
100
1
Dallas
Semiconductor
DS80C410
DS80C411
25
26
LQFP
76
75
SELECTOR GUIDE
PART
CAN BUS
ON-CHIP
SRAM
(kB)
DS80C410-FNY
1
DS80C410-FNY+
1
DS80C411-FNY
0
DS80C411-FNY+
0
73.25
73.25
73.25
73.25
+ Denotes lead-free/RoHS-compliant device.
MAX
CLOCK
SPEED
(MHz)
75
75
75
75
REVISION HISTORY
51
50
REVISION
102204
010705
060805
DESCRIPTION
New product release (DS80C410)
New product release (DS80C411)
Added lead-free devices to Ordering
Information and Selector Guide tables.
TINI is a registered trademark of Dallas Semiconductor Corp.
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