W195B Datasheet, PDF (9/13 Pages) Cypress Semiconductor – Frequency Generator for Integrated Core Logic

PRELIMINARY
W195B
Table 4. Additional Frequency Selections through Serial Data Interface Data Bytes
Input Conditions
Output Frequency
Data Byte 4, Bit 3 = 1
Bit 2
Bit 7
Bit 6
SEL_4 SEL_3 SEL_2
Bit 5
SEL_1
Bit 4
SEL_0
CPU SDRAM 3V66
1
1
1
1
1
133.6 133.6
66.8
1
1
1
1
0
Reserved
1
1
1
0
1
100.2 100.2
66.8
1
1
1
0
0
66.8
100.2
66.8
1
1
0
1
1
107
107
71.3
1
1
0
1
0
112
112
74.7
1
1
0
0
1
117
117
78
1
1
0
0
0
121
121
80.7
1
0
1
1
1
155
155
77.5
1
0
1
1
0
145
145
72.5
1
0
1
0
1
136
136
68
1
0
1
0
0
140
140
70
1
0
0
1
1
72
108
72
1
0
0
1
0
130
130
65
1
0
0
0
1
127
127
63.5
1
0
0
0
0
125
125
62.5
0
1
1
1
1
133.6 133.6
66.8
0
1
1
1
0
Reserved
0
1
1
0
1
100.2 100.2
66.8
0
1
1
0
0
66.8
100.2
66.8
0
1
0
1
1
105
105
70
0
1
0
1
0
110
110
73.3
0
1
0
0
1
114
114
76
0
1
0
0
0
119
119
79.3
0
0
1
1
1
124
124
82.7
0
0
1
1
0
129
129
64.5
0
0
1
0
1
95
95
63.3
0
0
1
0
0
138
138
69
0
0
0
1
1
150
150
75
0
0
0
1
0
75
113
75
0
0
0
0
1
90
90
60
0
0
0
0
0
83.3
125
83.3
PCI
33.4
33.4
33.4
35.7
37.3
39
40.3
38.8
36.3
34
35
36
32.5
31.8
31.3
33.4
33.4
33.4
35
36.7
38
39.7
41.3
32.3
31.7
34.5
37.5
37.5
30
41.7
APIC
16.7
Spread
Spectrum
±0.5%
16.7
±0.5%
16.7
±0.5%
17.8
±0.5%
18.7
±0.5%
19.5
±0.5%
20.2
±0.5%
19.4
±0.5%
18.1
±0.5%
17
±0.5%
17.5
±0.5%
18
±0.5%
16.3
±0.5%
15.9
±0.5%
15.6
±0.5%
16.7
OFF
16.7
OFF
16.7
OFF
17.5
OFF
18.3
OFF
19
OFF
19.8
OFF
20.7
OFF
16.1
OFF
15.8
OFF
17.3
OFF
18.8
OFF
18.8
OFF
15
OFF
20.8
OFF
9