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W195B Datasheet, PDF (12/13 Pages) Cypress Semiconductor – Frequency Generator for Integrated Core Logic
PRELIMINARY
Group Skew and Jitter Limits
Output Group
CPU
SDRAM
APIC
48MHz
3V66
PCI
REF
Pin-Pin Skew Max
175 ps
250 ps
250 ps
250 ps
175 ps
500 ps
N/A
Cycle-Cycle Jitter
250 ps
250 ps
500 ps
500 ps
500 ps
500 ps
1000 ps
Duty Cycle
45/55
45/55
45/55
45/55
45/55
45/55
45/55
Nom Vdd
2.5V
3.3V
2.5V
3.3V
3.3V
3.3V
3.3V
Output
Buffer
Test Point
Clock Output Wave
2.0
1.25
2.5V Clocking
Interface
0.4
TRISE
THIGH
TFALL
Test Load
TPERIOD
Duty Cycle
TLOW
THIGH
TPERIOD
Duty Cycle
2.4
3.3V Clocking 1.5
Interface 0.4
TRISE
TFALL
TLOW
Figure 8. Output Buffer
W195B
Skew, Jitter
Measure Point
1.25V
1.5V
1.25V
1.5V
1.5V
1.5V
1.5V
Ordering Information
Ordering Code
Package
Name
W195B
H
Package Type
48-pin SSOP (300 mils)
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Document #: 38-00815
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