BCM43455XKUBGT Datasheet, PDF(87/159 Page) Cypress Semiconductor – Single-Chip 5G WiFi IEEE 802.11ac MAC/Baseband/ Radio with Integrated Bluetooth 4.1 and FM Receiver

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

BCM43455XKUBGT Datasheet, PDF (87/159 Pages) Cypress Semiconductor – Single-Chip 5G WiFi IEEE 802.11ac MAC/Baseband/ Radio with Integrated Bluetooth 4.1 and FM Receiver

◁

BCM43455 Preliminary Data Sheet

Pin Descriptions

Table 19: Signal Descriptions (Cont.)

Signal Name

PCI_PME_L

WLBGA Ball

Type

Description

PCI power management event output.

Used to request a change in the device

or system power state. The assertion

and deassertion of this signal is

asynchronous to the PCIe reference

clock. This signal has an open-drain

output structure, as per the PCI Bus

Local Bus Specification, Revision 2.3.

WLAN SDIO Bus Interface

Note: These signals can also have alternate functionality depending on package and host interface mode.

SDIO_CLK

SDIO clock input.

SDIO_CMD

I/O

SDIO command line.

SDIO_DATA_0

I/O

SDIO data line 0.

SDIO_DATA_1

I/O

SDIO data line 1.

SDIO_DATA_2

I/O

SDIO data line 2.

SDIO_DATA_3

I/O

SDIO data line 3.

WLAN GPIO Interface

Note: The GPIO signals can be multiplexed via software and the JTAG_SEL pin to behave as various specific

functions.

GPIO_0

GPIO_1

GPIO_2

GPIO_3

GPIO_4

GPIO_5

GPIO_6

GPIO_7

GPIO_8

GPIO_9

GPIO_10

GPIO_13

D11

GPIO_14

D10

GPIO_15

GPIO_16

I/O

Programmable GPIO pins:

I/O

GPIO_2 is TCK/SWCLK if

I/O

JTAG_SEL = 1

I/O

GPIO_3 is TMS/SWDIO if

JTAG_SEL = 1

I/O

GPIO_4 is TDIO if JTAG_SEL = 1

I/O

GPIO_5 is TDO if JTAG_SEL = 1

I/O

GPIO_6 is TRST_L if JTAG_SEL = 1

I/O

BroadcomÂ®

November 5, 2015 â¢ 43455-DS109-R

BROADCOM CONFIDENTIAL

Page 86

▷