BCM43455XKUBGT Datasheet, PDF (151/159 Pages) Cypress Semiconductor – Single-Chip 5G WiFi IEEE 802.11ac MAC/Baseband/ Radio with Integrated Bluetooth 4.1 and FM Receiver

BCM43455 Preliminary Data Sheet
JTAG Timing
JTAG Timing
Signal Name
TCK
TDI
TMS
TDO
JTAG_TRST
Table 62: JTAG Timing Characteristics
Period
125 ns
–
–
–
250 ns
Output
Maximum
–
–
–
100 ns
–
Output
Minimum
–
–
–
0 ns
–
Setup
–
20 ns
20 ns
–
–
Hold
–
0 ns
0 ns
–
–
SWD Timing
The probe outputs data to SWDIO on the falling edge of SWDCLK and captures data from SWDIO on the rising
edge of SWDCLK. The target outputs data to SWDIO on the rising edge of SWDCLK and captures data from
SWDIO on the rising edge of SWDCLK. SWD timing is defined through the combination of Figure 43 and
Table 63.
Figure 43: SWD Read and Write Timing
Read Cycle
RVI probe output to SWDIO
RVI probe output to SWDCLK
Target output to SWDIO
Thigh Tlow
Stop Park
T_OS
Tri-State
Tri-State
Acknowledge
Write Cycle
RVI probe output to SWDIO Stop Park
RVI probe output to SWDCLK
Target output to SWDIO
Tri-State
T_is
Acknowledge
Data
Data Parity Start
Tri-State
Tri-State
T_ih
Data
Data Parity
Start
Tri-State
Table 63: SWD Read and Write Timing Parameters
Parameter Description
Tcyc
SWDCLK cycle time
Thigh
SWDCLK high period
Tlow
SWDCLK low period
T_os
SWDIO output skew to the falling edge of SWDCLK
T_is
Input setup time between SWDIO and the rising edge of SWDCLK
T_ih
Input hold time between SWDIO and the rising edge of SWDCLK
Min.
125
50
50
–5
20
0
Max. Units
–
ns
–
ns
–
ns
5
ns
–
ns
100 ns
Broadcom^®
November 5, 2015 • 43455-DS109-R
BROADCOM CONFIDENTIAL
Page 150