BCM43455XKUBGT Datasheet, PDF (32/159 Pages) Cypress Semiconductor – Single-Chip 5G WiFi IEEE 802.11ac MAC/Baseband/ Radio with Integrated Bluetooth 4.1 and FM Receiver

BCM43455 Preliminary Data Sheet
External Frequency Reference
Table 2: Crystal Oscillator and External Clock—Requirements and Performance (Cont.)
Crystal^a
External Frequency
Reference^{b c}
Parameter
Conditions/Notes
Min. Typ. Max. Min. Typ. Max. Units
WRF_XTAL_XOP DC-coupled digital signal
Input high level
–
–
–
1.0 –
1.26 V
WRF_XTAL_XOP IEEE 802.11a/b/g operation only –
–
–
400 –
1200 mV_p-p
input voltage
(see Figure 6 on
page 30)
WRF_XTAL_XOP IEEE 802.11n/ac AC-coupled –
–
–
1
–
–
V_p-p
input voltage
analog input
(see Figure 6 on
page 30)
Duty cycle
37.4 MHz clock
–
–
–
40 50 60 %
Phase Noise^g
37.4 MHz clock at 10 kHz offset –
–
–
–
–
–129 dBc/Hz
(IEEE 802.11b/g) ^{37.4 MHz clock at 100 kHz offset –}
–
–
–
–
–136 dBc/Hz
Phase Noise^g
37.4 MHz clock at 10 kHz offset –
–
–
–
–
–137 dBc/Hz
(IEEE 802.11a)
37.4 MHz clock at 100 kHz offset –
–
–
–
–
–144 dBc/Hz
Phase Noise^g
37.4 MHz clock at 10 kHz offset –
–
–
–
–
–134 dBc/Hz
(IEEE 802.11n,
37.4 MHz clock at 100 kHz offset –
–
–
–
–
–141 dBc/Hz
2.4 GHz)
Phase Noise^g
37.4 MHz clock at 10 kHz offset –
–
–
–
–
–142 dBc/Hz
(IEEE 802.11n,
37.4 MHz clock at 100 kHz offset –
–
–
–
–
–149 dBc/Hz
5 GHz)
Phase Noise^g
37.4 MHz clock at 10 kHz offset –
–
–
–
–
–148 dBc/Hz
(IEEE 802.11ac, ^{37.4 MHz clock at 100 kHz offset –}
–
–
–
–
–155 dBc/Hz
5 GHz)
a. (Crystal) Use WRF_XTAL_XON and WRF_XTAL_XOP.
b. See “External Frequency Reference” on page 30 for alternative connection methods.
c. For a clock reference other than 37.4 MHz, 20 × log10(f/ 37.4) dB should be added to the limits, where f = the
reference clock frequency in MHz.
d. BT_TM6 should be tied low for a 52 MHz clock reference. For other frequencies, BT_TM6 should be tied high.
Note that 52 MHz is not an auto-detected frequency using the LPO clock.
e. The frequency step size is approximately 80 Hz resolution.
f. It is the responsibility of the equipment designer to select oscillator components that comply with these
specifications.
g. Assumes that external clock has a flat phase noise response above 100 kHz.
Broadcom^®
November 5, 2015 • 43455-DS109-R
BROADCOM CONFIDENTIAL
Page 31