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CY8C3245LTI-144T Datasheet, PDF (82/128 Pages) Cypress Semiconductor – Programmable System-on-Chip (PSoC®)
PSoC® 3: CY8C32 Family Data Sheet
Figure 11-22. USBIO Output High Voltage and Current, GPIO
Mode
Figure 11-23. USBIO Output Low Voltage and Current, GPIO
Mode
Table 11-15. USBIO AC Specifications
Parameter
Description
Tdrate
Full-speed data rate average bit rate
Conditions
Tjr1
Tjr2
Tdj1
Tdj2
Tfdeop
Tfeopt
Tfeopr
Tfst
Fgpio_out
Tr_gpio
Tf_gpio
Receiver data jitter tolerance to next
transition
Receiver data jitter tolerance to pair
transition
Driver differential jitter to next
transition
Driver differential jitter to pair transition
Source jitter for differential transition to
SE0 transition
Source SE0 interval of EOP
Receiver SE0 interval of EOP
Width of SE0 interval during differ-
ential transition
GPIO mode output operating
frequency
3 V  VDDD  5.5 V
VDDD = 1.71 V
Rise time, GPIO mode, 10%/90%
VDDD
VDDD > 3 V, 25 pF load
VDDD = 1.71 V, 25 pF load
Fall time, GPIO mode, 90%/10% VDDD VDDD > 3 V, 25 pF load
VDDD = 1.71 V, 25 pF load
Figure 11-24. USBIO Output Rise and Fall Times, GPIO Mode,
Min
Typ
12 – 0.25% 12
–8
–
–5
–
–3.5
–
–4
–
–2
–
160
–
82
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Max
12 +
0.25%
8
5
3.5
4
5
175
–
14
20
6
12
40
12
40
Units
MHz
ns
ns
ns
ns
ns
ns
ns
ns
MHz
MHz
ns
ns
ns
ns
Document Number: 001-56955 Rev. *Y
Page 82 of 128