S25FS064S Datasheet, PDF (59/147 Pages) Cypress Semiconductor – 64 Mbit (8 Mbyte), 1.8-V FS-S Flash

PRELIMINARY
S25FS064S
9.6.5.2
Configuration Register 3 Volatile (CR3V)
Related Commands: Read Any Register (RDAR 65h), Write Any Register (WRAR 71h).
Table 9.19 Configuration Register 3 Volatile (CR3V)
Bits
Field Name
Function
Type
Default
State
Description
7
RFU
Reserved
Reserved for Future Use
6
RFU
Reserved
Reserved for Future Use
5
BC_V
Blank Check
Volatile
1= Blank Check during erase enabled
0= Blank Check disabled
4
02h_V
Page Buffer Wrap
1= Wrap at 512 Bytes
0= Wrap at 256 Bytes
3
20h_V
4KB Erase
Volatile,
Read Only
CR3NV
1= 4KB Erase disabled (Uniform Sector Architecture)
0= 4KB Erase enabled (Hybrid Sector Architecture)
2
30h_V
Clear Status / Resume
Select
1= 30h is Erase or Program Resume command
0= 30h is clear status command
1
D8h_V
Block Erase Size
Volatile
1= 256KB Erase
0= 64KB Erase
0
F0h_V
Legacy Software Reset
Enable
1= F0h Software Reset is enabled
0= F0h Software Reset is disabled (ignored)
Blank Check Volatile CR3V[5]: This bit controls the blank check during erase feature. When this feature is enabled an erase
command first evaluates the erase status of the sector. If the sector is found to have not completed its last erase successfully, the
sector is unconditionally erased. If the last erase was successful, the sector is read to determine if the sector is still erased (blank).
The erase operation is started immediately after finding any programmed zero. If the sector is already blank (no programmed zero
bit found) the remainder of the erase operation is skipped. This can dramatically reduce erase time when sectors being erased do
not need the erase operation. When enabled the blank check feature is used within the parameter erase, sector erase, and bulk
erase commands. When blank check is disabled an erase command unconditionally starts the erase operation.
02h Volatile CR3V[4]: This bit controls the page programming buffer address wrap point. Legacy SPI devices generally have used
a 256 Byte page programming buffer and defined that if data is loaded into the buffer beyond the 255 Byte location, the address at
which additional bytes are loaded would be wrapped to address zero of the buffer. The FS-S Family provides a 512 Byte page
programming buffer that can increase programming performance. For legacy software compatibility, this configuration bit provides
the option to continue the wrapping behavior at the 256 Byte boundary or to enable full use of the available 512 Byte buffer by not
wrapping the load address at the 256 Byte boundary.
20h Volatile CR3V[3]: This bit controls the availability of 4 KB parameter sectors in the main Flash array address map. The
parameter sectors can overlay the highest or lowest 32 KB address range of the device or they can be removed from the address
map so that all sectors are uniform size. This bit shall not be written to a value different than the value of CR3NV[3]. The value of
CR3V[3] may only be changed by writing CR3NV[3].
30h Volatile CR3V[2]: This bit controls how the 30h instruction code is used. The instruction may be used as a clear status
command or as an alternate program / erase resume command. This allows software compatibility with either Cypress legacy SPI
devices or alternate vendor devices.
D8h Volatile CR3V[1]: This bit controls the area erased by the D8h or DCh instructions in the FS-S Family. The instruction can be
used to erase 64 KB physical sectors or 256 KB size and aligned blocks. The option to erase 256 KB blocks in the lower density
family members allows for consistent software behavior across all densities that can ease migration between different densities.
F0h Volatile CR3V[0]: This bit controls the availability of the Cypress legacy FL-S family software reset instruction. The FS-S
Family supports the industry common 66h + 99h instruction sequence for software reset. This configuration bit allows the option to
continue use of the legacy F0h single command for software reset.
9.6.6 Configuration Register 4
Configuration register 4 controls the main Flash array read commands burst wrap behavior. The burst wrap configuration does not
affect commands reading from areas other than the main Flash array e.g. read commands for registers or OTP array. The non-
Document Number: 002-03631 Rev. *C
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