BCM43362KUBGT Datasheet, PDF (57/84 Pages) Cypress Semiconductor – Single-Chip IEEE 802.11™ b/g/n MAC/Baseband/Radio + SDIO

BCM43362 Data Sheet
WLAN GPIO Signals and Strapping Options
WLAN GPIO Signals and Strapping Options
The pins listed in Table 10 are sampled at power-on reset (POR) to determine the various operating modes.
Sampling occurs a few milliseconds after an internal POR or deassertion of the external POR. After the POR,
each pin assumes the GPIO or alternative function specified in the signal descriptions table. Each strapping
option pin has an internal pull-up (PU) or pull-down (PD) resistor that determines the default mode. To change
the mode, connect an external PU resistor to VDDIO or a PD resistor to GND, using a 10 kΩ resistor or less.
Note: Refer to the reference board schematics for more information.
Table 10: GPIO Functions and Strapping Options
WLBGA Pin
Pin Name #
Default Function
GPIO_0 E4
0
spimode_sel
Description
This pin selects the host interface mode:
• 0: SDIO
• 1: gSPI
Broadcom_®
February 13, 2015 • 43362-DS106-R
IEEE 802.11 b/g/n MAC/Baseband/Radio + SDIO
Page 56
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