BCM43362KUBGT Datasheet, PDF (56/84 Pages) Cypress Semiconductor – Single-Chip IEEE 802.11™ b/g/n MAC/Baseband/Radio + SDIO

BCM43362 Data Sheet
Signal Assignments
Table 9: BCM43362 During Reset and After Reset or During Sleep (Cont.)
During Reset
After Reset (and after
firmware
initialization) or During Sleep
Signal Name/Group
I/O Type Pull R
I/O
Pull R
I/O
RF Switch Control
rf_sw_ctl_0
rf_sw_ctl_1
rf_sw_ctl_2
rf_sw_ctl_3
Digital
PU
Digital
PD
Digital
PD
Digital
PD
High Z
High Z
High Z
High Z
None
None
None
None
Output
Output
Output
Output
GPIOs^g
gpio_x
Digital
None
High Z
Configurable Configurable
a. Within 1.5 ms of WL_RST_N being driven high, the PMU changes this from PD to High-Z.
b. Software can optionally enable a weak internal pull-down resistor.
c. Internal pull-down resistor can be disabled via software.
d. Software can optionally disable the weak internal pull-up for these signals.
e. Default mode (Open source): XTAL_PU is driven HIGH when a clock is requested, and pulled low with a weak
internal pull-down resistor when a clock is not requested.
Push-Pull: Always driven HIGH or LOW (no PU/PD). Available via a strapping option for the FCFBGA and
WLCSP packages.
f. The clock is not requested during Sleep mode.
g. The Bluetooth coexistence and GPIO signals have keepers that prevent them from floating when they aren’t
connected; however, when they are connected to another component, prevention from floating can’t be assured
by the keepers.
Broadcom_®
February 13, 2015 • 43362-DS106-R
IEEE 802.11 b/g/n MAC/Baseband/Radio + SDIO
Page 55
BROADCOM CONFIDENTIAL