BCM43362KUBGT Datasheet, PDF (30/84 Pages) Cypress Semiconductor – Single-Chip IEEE 802.11™ b/g/n MAC/Baseband/Radio + SDIO

BCM43362 Data Sheet
Generic SPI Mode
Figure 14: gSPI Signal Timing with Status (Response Delay = 0)
Write
cs
sclk
mosi
miso
Write-Read
cs
sclk
mosi
miso
CC3311
CC11 CC00 DD3311
DD11 DD00
SS3311
SS11 SS00
Command 32 bits
Write Data 16*n bits
Status 32 bits
CC3311
CC00
Command 32 bits
DD3311
DD11 DD00 SS3311
SS00
Read Data 16*n bits
Status 32 bits
Read
cs
sclk
mosi
miso
CC3311
CC00
Command 32 bits
DD3311
DD11 DD00 SS3311
SS00
Read Data 16*n bits
Status 32 bits
Table 5: gSPI Status Field Details
Bit
Name
0
Data not available
1
Underflow
2
Overflow
3
F2 interrupt
5
F2 RX Ready
7
Reserved
8
F2 Packet Available
9:19
F2 Packet Length
Description
The requested read data is not available.
FIFO underflow occurred due to current (F2, F3) read
command.
FIFO overflow occurred due to current (F1, F2, F3) write
command.
F2 channel interrupt
F2 FIFO is ready to receive data (FIFO empty).
–
Packet is available/ready in F2 TX FIFO.
Length of packet available in F2 FIFO
Broadcom_®
February 13, 2015 • 43362-DS106-R
IEEE 802.11 b/g/n MAC/Baseband/Radio + SDIO
Page 29
BROADCOM CONFIDENTIAL