BCM20707 Datasheet, PDF (55/65 Pages) Cypress Semiconductor – Complies with Bluetooth Core Specification version 4.2 including BR/EDR/BLE

BCM20707 Preliminary Data Sheet
Timing and AC Characteristics
Long Frame Sync, Slave Mode
Figure 17: PCM Timing Diagram (Long Frame Sync, Slave Mode)
PCM_BCLK
PCM_SYNC
PCM_OUT
6
PCM_IN
1
4
5
Bit 0
Bit 0
Bit 1
Bit 1
2
3
9
HIGH IMPEDANCE
7
8
Table 25: PCM Interface Timing Specifications (Long Frame Sync, Slave Mode)
Reference Characteristics
1
PCM bit clock frequency
2
PCM bit clock LOW
3
PCM bit clock HIGH
4
PCM_SYNC setup
5
PCM_SYNC hold
6
PCM_OUT delay
7
PCM_IN setup
8
PCM_IN hold
9
Delay from rising edge of PCM_BCLK during last bit
period to PCM_OUT becoming high impedance
Minimum Typical
–
–
TBD
–
TBD
–
TBD
–
TBD
–
TBD
–
TBD
–
TBD
–
TBD
–
Maximum Unit
TBD
–
–
–
–
TBD
–
–
TBD
MHz
ns
ns
ns
ns
ns
ns
ns
ns
Broadcom^®
May 27, 2016 • 20707-DS206-R
BROADCOM CONFIDENTIAL
Bluetooth SoC
Page 54