BCM20707 Datasheet, PDF (54/65 Pages) Cypress Semiconductor – Complies with Bluetooth Core Specification version 4.2 including BR/EDR/BLE

BCM20707 Preliminary Data Sheet
Timing and AC Characteristics
Long Frame Sync, Master Mode
Figure 16: PCM Timing Diagram (Long Frame Sync, Master Mode)
PCM_BCLK
PCM_SYNC
1
4
PCM_OUT
Bit 0
Bit 1
5
PCM_IN
Bit 0
Bit 1
2
3
8
HIGH IMPEDANCE
6
7
Table 24: PCM Interface Timing Specifications (Long Frame Sync, Master Mode)
Reference Characteristics
1
PCM bit clock frequency
2
PCM bit clock LOW
3
PCM bit clock HIGH
4
PCM_SYNC delay
5
PCM_OUT delay
6
PCM_IN setup
7
PCM_IN hold
8
Delay from rising edge of PCM_BCLK during last bit
period to PCM_OUT becoming high impedance
Minimum Typical Maximum Unit
–
–
TBD
–
TBD
–
TBD
–
TBD
–
–
TBD
MHz
ns
ns
ns
TBD
–
TBD
ns
TBD
–
–
ns
TBD
–
–
ns
TBD
–
TBD
ns
Broadcom^®
May 27, 2016 • 20707-DS206-R
BROADCOM CONFIDENTIAL
Bluetooth SoC
Page 53