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BCM20707 Datasheet, PDF (34/65 Pages) Cypress Semiconductor – Complies with Bluetooth Core Specification version 4.2 including BR/EDR/BLE | |||
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BCM20707 Preliminary Data Sheet
Pin Descriptions
Table 7: BCM20707 36-Pin WLBGA List (Cont.)
Ball
Signal
I/O Power Domain Description
C4
BT_GPIO_2
F2
BT_GPIO_3
P0
I
VDDO
I/O
VDDO
I
VDDO
LPO_IN
C5
BT_GPIO_5
P8
P33
I
N/A
I/O
VDDO
I
VDDO
I
VDDO
F5
BT_UART_RXD
I
VDDO
E5
BT_UART_TXD
O
VDDO
F4
BT_UART_RTS_N
O
VDDO
F3
BT_UART_CTS_N
I
VDDO
F6
BT_CLK_REQ
O
VDDO
F1
SPI2_MISO_I2C_SCL I/O
VDDO
E3
SPI2_MOSI_I2C_SDA I/O
VDDO
E1
SPI2_CLK
I/O
VDDO
E2
SPI2_CSN
I/O
VDDO
B6
I2S_DI/PCM_IN
I/O
VDDO
P3
I
VDDO
When high, this signal extends the XTAL
warm-up time for external CLK requests.
Otherwise, it is typically connected to
ground.
General-purpose I/O
⢠GPIO: P0
⢠A/D converter input 29
⢠Peripheral UART: puart_tx
⢠SPI_1: MOSI (master and slave)
⢠IR_RX
⢠60 Hz_main
Note: Not available during TM1 = 1.
External LPO input
General-purpose I/O
⢠GPIO: P8
⢠A/D converter input 27
⢠External T/R Switch Control: ~tx_pd
⢠GPIO: P33
⢠A/D converter input 6
⢠Quadrature: QDX1
⢠SPI_1: MOSI (slave only)
⢠Auxiliary clock output: ACLK1
⢠Peripheral UART: puart_rx
UART receive data
UART transmit data
UART request to send output
UART clear to send input
Used for shared-clock application.
BSC CLOCK
BSC DATA
Serial flash SPI clock
Serial flash active-low chip select
⢠PCM/I2S data input.
⢠I2C_SDA
⢠GPIO: P3
⢠Quadrature: QDX1
⢠Peripheral UART: puart_cts
⢠SPI_1: SPI_CLK (master and slave)
Broadcom®
May 27, 2016 ⢠20707-DS206-R
BROADCOM CONFIDENTIAL
Bluetooth SoC
Page 33
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