BCM20707 Datasheet, PDF (53/65 Pages) Cypress Semiconductor – Complies with Bluetooth Core Specification version 4.2 including BR/EDR/BLE

BCM20707 Preliminary Data Sheet
Timing and AC Characteristics
Short Frame Sync, Slave Mode
Figure 15: PCM Timing Diagram (Short Frame Sync, Slave Mode)
PCM _BCLK
PCM _SYNC
PCM _O UT
6
PCM _IN
1
4
5
2
3
9
7
H IGH IM PEDAN CE
8
Table 23: PCM Interface Timing Specifications (Short Frame Sync, Slave Mode)
Reference
1
2
3
4
5
6
7
8
9
Characteristics
Minimum
PCM bit clock frequency
–
PCM bit clock LOW
TBD
PCM bit clock HIGH
TBD
PCM_SYNC setup
TBD
PCM_SYNC hold
TBD
PCM_OUT delay
TBD
PCM_IN setup
TBD
PCM_IN hold
TBD
Delay from rising edge of PCM_BCLK during last bit TBD
period to PCM_OUT becoming high impedance
Typical
–
–
–
–
–
–
–
–
–
Maximum Unit
TBD
MHz
–
ns
–
ns
–
ns
–
ns
TBD
ns
–
ns
–
ns
TBD
ns
Broadcom^®
May 27, 2016 • 20707-DS206-R
BROADCOM CONFIDENTIAL
Bluetooth SoC
Page 52