BCM20707 Datasheet, PDF (52/65 Pages) Cypress Semiconductor – Complies with Bluetooth Core Specification version 4.2 including BR/EDR/BLE

BCM20707 Preliminary Data Sheet
Timing and AC Characteristics
PCM Interface Timing
Short Frame Sync, Master Mode
Figure 14: PCM Timing Diagram (Short Frame Sync, Master Mode)
PCM _BCLK
PCM _SYN C
PCM_OUT
5
PC M _IN
1
4
2
3
8
HIGH IM PEDANCE
6
7
Table 22: PCM Interface Timing Specifications (Short Frame Sync, Master Mode)
Reference Characteristics
1
PCM bit clock frequency
2
PCM bit clock LOW
3
PCM bit clock HIGH
4
PCM_SYNC delay
5
PCM_OUT delay
6
PCM_IN setup
7
PCM_IN hold
8
Delay from rising edge of PCM_BCLK during last bit
period to PCM_OUT becoming high impedance
Minimum Typical
–
–
20.0
–
20.0
–
0
–
–0.4
–
16.9
–
25.0
–
–0.4
–
Maximum Unit
20.0
MHz
–
ns
–
ns
5.7
ns
5.6
ns
–
ns
–
ns
5.6
ns
Broadcom^®
May 27, 2016 • 20707-DS206-R
BROADCOM CONFIDENTIAL
Bluetooth SoC
Page 51