4000S Datasheet, PDF (31/35 Pages) Cypress Semiconductor – 32-bit MCU Subsystem

PSoC^® 4: PSoC 4000S
Family Datasheet
Acronyms
Table 40. Acronyms Used in this Document
Acronym
abus
ADC
AG
AHB
ALU
AMUXBUS
API
APSR
ARM^®
ATM
BW
CAN
CMRR
CPU
CRC
DAC
DFB
DIO
DMIPS
DMA
DNL
DNU
DR
DSI
DWT
ECC
ECO
EEPROM
EMI
EMIF
EOC
EOF
EPSR
ESD
Description
analog local bus
analog-to-digital converter
analog global
AMBA (advanced microcontroller bus
architecture) high-performance bus, an ARM
data transfer bus
arithmetic logic unit
analog multiplexer bus
application programming interface
application program status register
advanced RISC machine, a CPU architecture
automatic thump mode
bandwidth
Controller Area Network, a communications
protocol
common-mode rejection ratio
central processing unit
cyclic redundancy check, an error-checking
protocol
digital-to-analog converter, see also IDAC, VDAC
digital filter block
digital input/output, GPIO with only digital
capabilities, no analog. See GPIO.
Dhrystone million instructions per second
direct memory access, see also TD
differential nonlinearity, see also INL
do not use
port write data registers
digital system interconnect
data watchpoint and trace
error correcting code
external crystal oscillator
electrically erasable programmable read-only
memory
electromagnetic interference
external memory interface
end of conversion
end of frame
execution program status register
electrostatic discharge
Table 40. Acronyms Used in this Document (continued)
Acronym
ETM
FIR
FPB
FS
GPIO
HVI
IC
IDAC
IDE
I²C, or IIC
IIR
ILO
IMO
INL
I/O
IPOR
IPSR
IRQ
ITM
LCD
LIN
LR
LUT
LVD
LVI
LVTTL
MAC
MCU
MISO
NC
NMI
NRZ
NVIC
NVL
opamp
PAL
Description
embedded trace macrocell
finite impulse response, see also IIR
flash patch and breakpoint
full-speed
general-purpose input/output, applies to a PSoC
pin
high-voltage interrupt, see also LVI, LVD
integrated circuit
current DAC, see also DAC, VDAC
integrated development environment
Inter-Integrated Circuit, a communications
protocol
infinite impulse response, see also FIR
internal low-speed oscillator, see also IMO
internal main oscillator, see also ILO
integral nonlinearity, see also DNL
input/output, see also GPIO, DIO, SIO, USBIO
initial power-on reset
interrupt program status register
interrupt request
instrumentation trace macrocell
liquid crystal display
Local Interconnect Network, a communications
protocol.
link register
lookup table
low-voltage detect, see also LVI
low-voltage interrupt, see also HVI
low-voltage transistor-transistor logic
multiply-accumulate
microcontroller unit
master-in slave-out
no connect
nonmaskable interrupt
non-return-to-zero
nested vectored interrupt controller
nonvolatile latch, see also WOL
operational amplifier
programmable array logic, see also PLD
Document Number: 002-00123 Rev. *I
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