CY8C20X34 Datasheet, PDF (25/218 Pages) Cypress Semiconductor – Technical Reference Manual (TRM)

Section B: PSoC Core
Summary Table of the Core Registers (continued)
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
SLEEP AND WATCHDOG REGISTERS (page 65)
0,E3h
1,EBh
RES_WDT
SLP_CFG
PSSDC[1:0]
WDSL_Clear[7:0]
Bit 1
Bit 0
LEGEND
L The and f, expr; or f, expr; and xor f, expr instructions can be used to modify this register.
x An “x” before the comma in the address field indicates that this register can be accessed or written to no matter what bank is used.
C Clearable register or bit(s).
R Read register or bit(s).
W Write register or bit(s).
Access
W : 00
RW : 00
PSoC CY8C20x34 TRM, Version 1.0
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