CY8C20X34 Datasheet, PDF (188/218 Pages) Cypress Semiconductor – Technical Reference Manual (TRM)

OUT_P1
1,DDh
20.4.6
OUT_P1
Output Override to Port 1 Register
Individual Register Names and Addresses:
OUT_P1: 1,DDh
Access : POR
Bit Name
7
RW : 0
P16D
6
RW : 0
P16EN
5
RW : 0
P14D
4
RW : 0
P14EN
3
RW : 0
P12D
1,DDh
2
RW : 0
P12EN
1
RW : 0
P10D
0
RW : 0
P10EN
This register enables specific internal signals to be output to Port 1 pins.
Note that the GPIO drive modes must be specified to support the desired output mode (registers PRT1DM1 and PRT1DM0).
If a pin is enabled for output by a bit in this register, the corresponding signal has priority over any other internal function that
may be configured to output to that pin.
For additional information, refer to the Register Definitions on page 94 in the Digital Clocks chapter.
Bit
Name
7
P16D
6
P16EN
5
P14D
4
P14EN
3
P12D
2
P12EN
1
P10D
0
P10EN
Description
Bit selects the data output to P1[6] when P16EN is high.
0
Select Timer output (TIMEROUT)
1
Select CLK32
Bit enables pin P1[6] for output of the signal selected by the P16D bit.
0
No internal signal output to P1[6]
1
Output the signal selected by P16D to P1[6]
Bit selects the data output to P1[4] when P14EN is high.
0
Select Relaxation Oscillator (RO)
1
Select Comparator 1 Output (CMP1)
Bit enables pin P1[4] for output of the signal selected by the P14D bit.
0
No internal signal output to P1[4]
1
Output the signal selected by P14D to P1[4]
Bit selects the data output to P1[2] when P12EN is high.
0
Select Main System Clock (SYSCLK)
1
Select CapSense output signal (CS). This signal is selected by the CSOUT[1:0] bits in the
CS_CR0 register.
Bit enables pin P1[2] for output of the signal selected by the P12D bit.
0
No internal signal output to P1[2]
1
Output the signal selected by P12D to P1[2]
Bit selects the data output to P1[0] when P10EN is high.
0
Select Sleep Interrupt (SLPINT)
1
Select Comparator 0 Output (CMP0)
Bit enables pin P1[0] for output of the signal selected by the P10D bit.
0
No internal signal output to P1[0]
1
Output the signal selected by P10D to P1[0]
188
PSoC CY8C20x34 TRM, Version 1.0