CY8C20X34 Datasheet, PDF (139/218 Pages) Cypress Semiconductor – Technical Reference Manual (TRM)

20. Register Reference
This chapter is a reference for all the PSoC device registers in address order, for Bank 0 and Bank 1. The most detailed
descriptions of the PSoC registers are in the Register Definitions section of each chapter. The registers that are in both banks
are incorporated with the Bank 0 registers, designated with an ‘x’, rather than a ‘0’ preceding the comma in the address. Bank
0 registers are listed first and begin on page 140. Bank 1 registers are listed second and begin on page 183. A condensed
view of all the registers is shown in the register mapping tables starting on page 135.
20.1 Maneuvering Around the Registers
For ease-of-use, this chapter is formatted so that there is one register per page, although some registers use two pages. On
each page, from top to bottom, there are four sections:
1. Register name and address (from lowest to highest).
2. Register table showing the bit organization, with reserved bits grayed out.
3. Written description of register specifics or links to additional register information.
4. Detailed register bit descriptions.
Use the register tables, in addition to the detailed register bit descriptions, to determine which bits are reserved. Reserved bits
are grayed table cells and are not described in the bit description section. Reserved bits should always be written with a value
of ‘0’. For all registers, an ‘x’ before the comma in the address field indicates that the register can be accessed or written to no
matter what bank is used. For example, the M8C flag register’s (CPU_F) address is ’x,F7h’ meaning it is located in bank 0
and bank 1 at F7h.
20.2 Register Conventions
This table lists the register conventions that are specific to this chapter.
Register Conventions
Convention
‘x’ in a register name
R
W
O
L
C
00
XX
0,
1,
x,
Empty, grayed-out table cell
Example
PRTxIE
R : 00
W : 00
RO : 00
RL : 00
RC : 00
RW : 00
RW : XX
0,04h
1,23h
x,F7h
Description
Multiple instances/address ranges of the same register
Read register or bit(s)
Write register or bit(s)
Only a read/write register or bit(s).
Logical register or bit(s)
Clearable register or bit(s)
Reset value is 0x00 or 00h
Register is not reset
Register is in bank 0
Register is in bank 1
Register exists in register bank 0 and register bank 1
Reserved bit or group of bits, unless otherwise stated
PSoC CY8C20x34 TRM, Version 1.0
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