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BCM4356XKWBGT Datasheet, PDF (179/195 Pages) Cypress Semiconductor – Single-Chip 5G WiFi IEEE 802.11ac 2×2 MAC/ Baseband/Radio with Integrated Bluetooth 4.1, FM Receiver, and Wireless Charging
BCM4356 Advance Data Sheet
Data Timing, DDR50 Mode
Figure 46: SDIO Data Timing (DDR50 Mode)
FPP
SDIO_CLK
DAT[3:0]
input
Invalid
tISU2x
tIH2x
Data
Invalid
tISU2x
tIH2x
Data
Invalid
SDIO Timing
Data
Invalid
DAT[3:0]
output
tODLY2x
(min)
Data
tODLY2x (max)
tODLY2x
(min)
Data
tODLY2x (max)
Available timing
window for card
output transition
Data
In DDR50 mode, DAT[3:0] lines are sampled on both edges of
the clock (not applicable for CMD line)
Available timing
window for host to
sample data from card
Parameter
Input CMD
Input setup time
Input hold time
Output CMD
Output delay time
Output hold time
Input DAT
Input setup time
Input hold time
Output DAT
Output delay time
Output hold time
Table 58: SDIO Bus Timing Parameters (DDR50 Mode)
Symbol
Minimum Maximum Unit Comments
tISU
6
tIH
0.8
tODLY
–
tOH
1.5
tISU2x
3
tIH2x
0.8
tODLY2x
–
tODLY2x
1.5
–
–
13.7
–
–
–
7.5
–
ns CCARD < 10pF (1 Card)
ns CCARD < 10pF (1 Card)
ns CCARD < 30pF (1 Card)
ns CCARD < 15pF (1 Card)
ns CCARD < 10pF (1 Card)
ns CCARD < 10pF (1 Card)
ns CCARD < 25pF (1 Card)
ns CCARD < 15pF (1 Card)
Broadcom®
May 8, 2015 • 4356-DS103-R
BROADCOM CONFIDENTIAL
Page 178