CY8C28243_09 Datasheet, PDF (16/65 Pages) Cypress Semiconductor – PSoC Programmable System-on-Chip

PRELIMINARY
CY8C28xxx
Register Reference
This section lists the registers of the CY8C28xxx PSoC devices. For detailed register information, reference the
PSoC Programmable System-on-Chip Technical Reference Manual for CY8C28xxx PSoC devices.
Register Conventions
Register Mapping Tables
The register conventions specific to this section are listed in the
following table.
Convention
R
W
L
C
#
Description
Read register or bit(s)
Write register or bit(s)
Logical register or bit(s)
Clearable register or bit(s)
Access is bit specific
CY8C28xxx PSoC devices have a total register address space
of 512 bytes. The register space is referred to as I/O space and
is divided into two banks. The XIO bit in the Flag register
(CPU_F) determines which bank of registers CPU instructions
access. When the XIO bit is set the registers in Bank 1 are
accessed by CPU instructions. When the XIO bit is cleared the
registers in Bank 0 are accessed by CPU instructions.
Note In the following register mapping tables, blank fields are
reserved and should not be accessed.
Document Number: 001-48111 Rev. *D
Page 16 of 65
[+] Feedback