CY8C28243_09 Datasheet, PDF (10/65 Pages) Cypress Semiconductor – PSoC Programmable System-on-Chip

PRELIMINARY
CY8C28xxx
Pinouts
This section describes, lists, and illustrates the CY8C28xxx PSoC device pins and pinout configurations.
The CY8C28xxx PSoC devices are available in a variety of packages which are listed and illustrated in the following tables. Every
port pin (labeled with a “P”) is capable of Digital I/O. However, Vss, Vdd, SMP, and XRES are not capable of Digital I/O.
20-Pin Part Pinout
Table 3. 20-Pin Part Pinout (SSOP)
Pin
Type
Pin
No. _{Digital Analog} Name
Description
CY8C28243 20-Pin PSoC Device
1 I/O I, M, S P0[7] Analog column mux and SAR ADC
input.^[6]
S, AI, M, P0[7] 1
S, AIO, M, P0[5] 2
20 Vdd
19 P0[6], M, AI, S
2 I/O I/O, M, S P0[5] Analog column mux and SAR ADC
input. Analog column output.^{[6, 7]}
S, AIO, M, P0[3] 3
S, AI, M, P0[1] 4
18 P0[4], M, AIO, S
17 P0[2], M, AIO, S
3 I/O I/O, M, S P0[3] Analog column mux and SAR ADC
input. Analog column output.^{[6, 7]}
SMP 5
I2C0 SCL, M, P1[7] 6
I2C0 SDA, M, P1[5] 7
SSOP
16
15
P0[0], M, AI, S
XRES
14 P1[6], M, I2C1 SCL
4
I/O
I, M, S
P0[1]
Analog column mux and SAR ADC
input.^[6]
M, P1[3]
I2C0 SCL, XTALin, M, P1[1]
8
9
13 P1[4], M, EXTCLK
12 P1[2], M, I2C1 SDA
5
Output
SMP Switch Mode Pump (SMP)
connection to external components.
Vss 10
11 P1[0], M, XTALout, I2C0 SDA
6 I/O
M P1[7] I2C0 Serial Clock (SCL).
7 I/O
M P1[5] I2C0 Serial Data (SDA).
8 I/O
M P1[3]
9 I/O
M P1[1] Crystal Input (XTALin), I2C0 Serial
Clock (SCL), ISSP-SCLK^[5].
10
Power
Vss Ground connection.
11 I/O
12 I/O
M P1[0] Crystal Output (XTALout), I2C0
Serial Data (SDA), ISSP-SDATA^[5].
M
P1[2] I2C1 Serial Data (SDA).^[8]
13 I/O
14 I/O
M P1[4] Optional External Clock Input
(EXTCLK).
M
P1[6] I2C1 Serial Clock (SCL).^[8]
15
Input
XRES Active high external reset with
internal pull down.
16 I/O I, M, S P0[0] Analog column mux and SAR ADC
input.^[6]
17 I/O I/O, M, S P0[2] Analog column mux and SAR ADC
input. Analog column output.^{[6, 9]}
18 I/O I/O, M, S P0[4] Analog column mux and SAR ADC
input. Analog column output.^{[6, 9]}
19 I/O I, M, S P0[6] Analog column mux and SAR ADC
input.^[6]
20
Power
Vdd Supply voltage.
LEGEND: A = Analog, I = Input, O = Output, S = SAR ADC Input, and M = Analog Mux Bus Input.
Notes
5. These are the ISSP pins, which are not High Z at POR (Power On Reset). See the PSoC Programmable System-on-Chip Technical Reference Manual for CY8C28xxx
PSoC devices for details.
6. CY8C28x52 and CY8C28x23 devices do not have a SAR ADC. Therefore, this pin does not function as a SAR ADC input for these devices.
7. CY8C28x13 and CY8C28x03 devices do not have any analog output buffers. Therefore, this pin does not function as an analog column output for these devices.
8. CY8C28x52, CY8C28x13, and CY8C28x33 devices only have one I2C block. Therefore, this GPIO does not function as an I2C pin for these devices.
9. CY8C28x33, CY8C28x23, CY8C28x13, and CY8C28x03 devices do not have an analog output buffer for this pin. Therefore, this pin does not function as an analog
column output for these devices.
Document Number: 001-48111 Rev. *D
Page 10 of 65
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