CY8C28243_09 Datasheet, PDF (1/65 Pages) Cypress Semiconductor – PSoC Programmable System-on-Chip

CY8C28243, CY8C28403, CY8C28413
PRELIMINARY _{CY8C28433, CY8C28445, CY8C28452}
CY8C28513, CY8C28533, CY8C28545
CY8C28623, CY8C28643, CY8C28645
PSoC^® Programmable System-on-Chip
Features
■ Varied Resource Options Within One PSoC Device Group
■ Powerful Harvard Architecture Processor
❐ M8C Processor Speeds up to 24 MHz
❐ 8x8 Multiply, 32-Bit Accumulate
❐ Low Power at High Speed
❐ 3.0V to 5.25V Operating Voltage
❐ Operating Voltages Down to 1.5V Using On-Chip Switched
Mode Pump (SMP)
❐ Industrial Temperature Range: -40°C to +85°C
■ Advanced Reconfigurable Peripherals (PSoC Blocks)
❐ Up to 12 Rail-to-Rail Analog PSoC Blocks Provide:
• Up to 14-Bit ADCs
• Up to 9-Bit DACs
• Programmable Gain Amplifiers
• Programmable Filters and Comparators
• Multiple ADC configurations
• Dedicated SAR ADC, up to 192 ksps with Sample and Hold
• Up to 4 Synchronized or Independent Delta-Sigma ADCs
for Advanced Applications
❐ Up to 4 Limited Type E Analog Blocks Provide:
• Dual Channel Capacitive Sensing Capability
• Comparators with Programmable DAC Reference
• Up to 10-bit Single-Slope ADCs
❐ Up to 12 Digital PSoC Blocks Provide:
• 8 to 32-Bit Timers, Counters, and PWMs
• Shift Register, CRC, and PRS Modules
• Up to 3 Full-Duplex UARTs
• Up to 6 Half-Duplex UARTs
• Multiple Variable Data Length SPI™ Masters or Slaves
• Connectable to All GPIO
❐ Complex Peripherals by Combining Blocks
■ Precision, Programmable Clocking
❐ Internal ±2.5% 24/48 MHz Main Oscillator
❐ Optional 32.768 kHz Crystal for Precise On-Chip Clocks
❐ Optional External Oscillator, up to 24 MHz
❐ Internal Low Speed, Low Power Oscillator for Watchdog and
Sleep Functionality
■ Flexible On-Chip Memory
❐ 16K Bytes Flash Program Storage 50,000 Erase/Write Cy-
cles
❐ 1K Bytes SRAM Data Storage
❐ In-System Serial Programming (ISSP™)
❐ Partial Flash Updates
❐ Flexible Protection Modes
❐ EEPROM Emulation in Flash
■ Programmable Pin Configurations
❐ 25 mA Sink, 10 mA Drive on All GPIO
❐ Pull Up, Pull Down, High Z, Strong, or Open Drain Drive
Modes on All GPIO
❐ Analog Input on All GPIO
❐ 30 mA Analog Outputs on GPIO
❐ Configurable Interrupt on all GPIO
■ Additional System Resources
❐ Up to 2 Hardware I²C Resources
• Each Resource Implements Slave, Master, or Multi-Master
Modes
• Operation Between 0 and 400 kHz
❐ Watchdog and Sleep Timers
❐ User-Configurable Low Voltage Detection
❐ Flexible Internal Voltage References
❐ Integrated Supervisory Circuit
❐ On-Chip Precision Voltage Reference
■ Complete Development Tools
❐ Free Development Software (PSoC Designer™)
❐ Full Featured In-Circuit Emulator, and Programmer
❐ Full Speed Emulation
❐ Flexible and Functional Breakpoint Structure
❐ 128K Trace Memory
System Block Diagram
PSoC
CORE
Port 5
Port 4
Port 3
Port 2
Port 1
Port
0
Analog
Drivers
System Bus
Global Digital Interconnect
Global Analog Interconnect
SRAM
1K
SROM Flash 16K
Interrupt
Controller
CPU Core (M8C)
Sleep and
Watchdog
Multiple Clock Sources
(Includes IMO, ILO, PLL, and ECO)
DIGITAL SYSTEM
Digital
Block
Array
ANALOG SYSTEM
Analog
Block
Array
Analog
Ref.
Analog
Input
Muxing
Digital
Clocks
2
MACs
4 Type 2 2 I²C ^{POR and LVD}
Decimators Blocks _{System Resets}
Internal
Voltage
Ref.
SYSTEM RESOURCES
Switch
Mode
Pump
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 001-48111 Rev. *D
• San Jose, CA 95134-1709 • 408-943-2600
Revised August 10, 2009
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