FX919A Datasheet, PDF (16/44 Pages) CML Microcircuits – 4-Level FSK Modem Data Pump

4-Level FSK Modem Data Pump
FX919A
When the modem is in receive mode, the µC should wait until the BFREE bit of the Status Register is '1', then
write the desired task to the Command Register.
Once the byte containing the desired task has been written to the Command Register, the modem will:
Set the BFREE bit of the Status Register to '0'.
Wait until enough received symbols are in the De-interleave Buffer.
Decode them as needed, and transfer the resulting binary data to the Data Block Buffer
Then the modem will set the BFREE and IRQ bits of the Status Register to '1', (causing the IRQN
output to go low if the IRQNEN bit of the Mode Register has been set to '1') to tell the µC that it may
read from the Data Block Buffer and write the next task to the modem. If more than 1 byte is contained
in the buffer, byte number 0 of the data will be read out first.
In this way the µC can read data and write a new task to the modem while the received symbols needed for this
new task are being received and stored in the De-interleave Buffer.
RXIN signal
IRQN o/p (IRQNEN = '1')
IRQ bit of Status Register
for task 1
BFREE bit of Status Register
Task from µC to Command Register
Data from Block Buffer to µC
Task 1
Figure 9 Receive Task Overlapping
for task 2
Task 2
Task 1 data
Detailed timings for the various tasks are given in Figures 10 and 11.
FX919A Modem Tasks:
B2 B1 B0
Receive Mode
0 0 0 NULL
0 0 1 SFSH Search for FS + Header
0 1 0 RHB
Read Header Block
0 1 1 RILB
Read Intermediate or Last
Block
1 0 0 SFS
Search for Frame Sync
1 0 1 R4S
Read 4 symbols
1 1 0 NULL
1 1 1 RESET Cancel any current action
NULL
T24S
THB
TIB
Transmit Mode
Transmit 24 symbols
Transmit Header Block
Transmit Intermediate Block
TLB
T4S
NULL
RESET
Transmit Last Block
Transmit 4 symbols
Cancel any current action
© 1996 Consumer Microcircuits Limited
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D/919A/4