CS4227 Datasheet, PDF (8/36 Pages) Cirrus Logic – Six Channel, 20-Bit Codec

CS4227
SWITCHING CHARACTERISTICS - CONTROL PORT (T_A = 25 °C; VA+, VD+ = +5 V ±5%;
Inputs: logic 0 = DGND, logic 1 = VD+; C_L = 30 pF)
Parameter
Symbol
Min
Max
Unit
SPI Mode (SPI/I2C = 0)
CCLK Clock Frequency
CS High Time Between Transmissions
CS Falling to CCLK Edge
CCLK Low Time
CCLK High Time
CDIN to CCL Rising Setup Time
CCLK Rising to DATA Hold Time
CCLK Falling to CDOUT stable
Rise Time of CDOUT
Fall Time of CDOUT
Rise Time of CCLK and CDIN
Fall Time of CCLK and CDIN
f_sck
-
t_csh
1.0
t_css
20
t_scl
66
t_sch
66
t_dsu
40
(Note 15)
t_dh
15
t_pd
-
t_r1
-
t_f1
-
(Note 16)
t_r2
-
(Note 16)
t_f2
-
6
MHz
-
µs
-
ns
-
ns
-
ns
-
ns
-
ns
45
ns
25
ns
25
ns
100
ns
100
ns
Notes: 15. Data must be held for sufficient time to bridge the transition time of CCLK.
16. For F_SCK < 1 MHz.
CS
t _css
t _scl t _sch
t _csh
CCLK
t _r2
t _f2
CDIN
CDOUT
t _dsu t _{dh t pd}
Figure 3. Control Port SPI Mode
8
DS281PP2