CS4227 Datasheet, PDF (25/36 Pages) Cirrus Logic – Six Channel, 20-Bit Codec

CS4227
2.21 Input Control Byte (12)
7
6
5
4
3
2
1
0
OVRM
0
0
0
GNR1
GNR0
GNL1
GNL0
GNL1-GNL0
Sets left input gain
0 - 0 dB
1 - 3 dB
2 - 6 dB
3 - 9 dB
GNR1-GNR0
Sets right input gain
0 - 0 dB
1 - 3 dB
2 - 6 dB
3 - 9 dB
OVRM
ADC Overflow Mask
This register defaults to 00h.
2.22 ADC Status Report Byte (Read Only) (13)
7
LVM1
6
LVM0
5
LVR2
4
LVR1
3
LVR0
2
LVL2
1
LVL1
0
LVL0
LVL2-LVL0, LVR2-0 Left and Right ADC output level
0 - Normal output levels
1 - -6 dB level
2 - -5 dB level
3 - -4 dB level
4 - -3 dB level
5 - -2 dB level
6 - -1 dB level
7 - Clipping
LVLM1-LVLM0
Mono ADC output level
0 - Normal output level
1 - -6 dB level
2 - -3 dB level
3 - Clipping
These bits are ’sticky’. They constantly monitor the ADC output for the peak levels and hold the max-
imum output. They are reset to 0 when read.
This register is read only.
DS281PP2
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