EP7311_05 Datasheet, PDF (39/58 Pages) Cirrus Logic – High-performance, Low-power, System-on-chip with SDRAM & Enhanced Digital Audio Interface

EP7311
High-Performance, Low-Power System on Chip
Table 21. 204-Ball TFBGA Ball Listing (Continued)
Ball Location
Name
C20
nPOR
D1
PB[7]
Strength^†
Schmitt
1
Reset
State
‡
Input
Type
I
I
D2
RXD[2]
I
D3
VDDIO
D18
VSSIO
D19
nBATCHG
D20
A[7]
E1
PB[4]
E2
TXD[2]
Pad power
Pad ground
I
1
Low
O
1
‡
Input
I
1
High
O
E3
WRITE/nSDRAS
1
Low
O
E18
nMEDCHG/nBROM
I
E19
E20
F1
F2
F3
F18
F19
F20
G1
G2
G3
G18
G19
G20
H1
H[2]
H[3]
H[18]
nEXTPWR
D[9]
PB[3]
PB[6]
TDI
D[7]
A[8]
D[10]
PB[1]
PB[2]
PB[5]
D[8]
A[9]
D[11]
PA[7]
TDO
PB[0]
A[10]
I
1
Low
I/O
1
‡
Input
I/O
1
‡
Input
I/O
with p/u*
I
1
Low
I/O
1
Low
O
1
Low
I/O
1
‡
Input
I/O
1
Input^‡
I/O
1
‡
Input
I/O
1
Input^‡
I/O
1
Low
O
1
Low
I/O
1
‡
Input
I/O
1
‡
Input
O
1
‡
Input
I/O
1
Low
O
Description
Power-on reset input
GPIO port B
UART 2 receive data
input
Digital I/O power,
3.3V
I/O ground
Battery changed
sense input
System byte address
GPIO port B
UART 2 transmit
data output
Transfer direction /
SDRAM RAS signal
output
Media change
interrupt input /
internal ROM boot
enable
External power
supply sense input
Data I/O
GPIO port B
GPIO port B
JTAG data input
Data I/O
System byte address
Data I/O
GPIO port B
GPIO port B
Data I/O
System byte address
Data I/O
GPIO port A
JTAG data out
GPIO port B
System byte address
DS506F1
©Copyright Cirrus Logic, Inc. 2005
(All Rights Reserved)
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