EP7311_05 Datasheet, PDF (11/58 Pages) Cirrus Logic – High-performance, Low-power, System-on-chip with SDRAM & Enhanced Digital Audio Interface

EP7311
High-Performance, Low-Power System on Chip
Pin Multiplexing
The following table shows the pin multiplexing of the MCP,
SSI2 and the CODEC. The selection between SSI2 and the
CODEC is controlled by the state of the SERSEL bit in
SYSCON2. The choice between the SSI2, CODEC, and the
MCP is controlled by the MCPSEL bit in SYSCON3 (see the
EP73xx User’s Manual for more information).
Pin
Mnemonic
I/O
MCP
SSI2 CODEC
SSICLK
SSITXDA
SSIRXDA
SSITXFR
SSIRXFR
I/O
SIBCLK SSICLK PCMCLK
O
SIBDOUT SSITXDA PCMOUT
I
SIBDIN SSIRXDA PCMIN
I/O SIBSYNC SSITXFR PCMSYNC
I
p/u
SSIRXFR
p/u
BUZ
O
Table R. MCP/SSI2/CODEC Pin Multiplexing
The following table shows the pins that have been multiplexed
in the EP7311.
Signal
nMOE
nMWE
WRITE
A[27:15]
A[14:13]
PD[7:6]
RUN
nMEDCHG
PD[0]
PE[1:0]
PE[2]
Block
Signal
Block
Static Memory
Static Memory
Static Memory
Static Memory
Static Memory
GPIO
System
Configuration
Interrupt
Controller
GPIO
GPIO
GPIO
nSDCAS
SDRAM
nSDWE
SDRAM
nSDRAS
SDRAM
DRA[0:12]
SDRAM
DRA[13:14]
SDRAM
SDQM[1:0]
SDRAM
CLKEN
System
Configuration
nBROM
Boot ROM
select
LEDFLSH
LED Flasher
BOOTSEL[1:0]
System
Configuration
CLKSEL
System
Configuration
Table S. Pin Multiplexing
DS506F1
©Copyright Cirrus Logic, Inc. 2005
(All Rights Reserved)
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